AC164112 Microchip Technology, AC164112 Datasheet - Page 113
![VOLTAGE LIMITER MPLAB ICD2 VPP](/photos/8/95/89583/ac164112_sml.jpg)
AC164112
Manufacturer Part Number
AC164112
Description
VOLTAGE LIMITER MPLAB ICD2 VPP
Manufacturer
Microchip Technology
Datasheet
1.AC164112.pdf
(302 pages)
Specifications of AC164112
Accessory Type
Voltage Limiter
Product
Cable Assemblies
Features
Programming And Debugging The Latest PIC12/PIC16/PIC18 Products
Development Tool Type
Hardware - Eval/Demo Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MPLAB®
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With
MPLAB ICD 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AC164112
Manufacturer:
Microchip Technology
Quantity:
135
- Current page: 113 of 302
- Download datasheet (5Mb)
REGISTER 11-1:
TABLE 11-1:
© 2009 Microchip Technology Inc.
CPSCON0
INTCON
OPTION_REG
TMR0
TRISA
Legend:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
R/W-1
RBPU
Name
– = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the Timer0 module.
Timer0 Module Register
CPSON
TRISA7
RBPU: PORTB Pull-up Enable bit
1 = PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual port latch values
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of INT pin
0 = Interrupt on falling edge of INT pin
T0CS: TMR0 Clock Source Select bit
1 = Transition on T0CKI pin or CPSOSC signal
0 = Internal instruction cycle clock (F
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on T0CKI pin
0 = Increment on low-to-high transition on T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS<2:0>: Prescaler Rate Select bits
RBPU
Bit 7
GIE
SUMMARY OF REGISTERS ASSOCIATED WITH TIMER0
INTEDG
R/W-1
OPTION_REG: OPTION REGISTER
INTEDG
TRISA6
PEIE
BIT VALUE
Bit 6
—
000
001
010
011
100
101
110
111
W = Writable bit
‘1’ = Bit is set
R/W-1
T0CS
TRISA5
T0CS
Bit 5
T0IE
—
TMR0 RATE
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
TRISA4
T0SE
Bit 4
INTE
—
R/W-1
T0SE
WDT RATE
CPSRNG1 CPSRNG0
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
OSC
TRISA3
RBIE
Bit 3
PSA
PIC16F72X/PIC16LF72X
/4)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
PSA
TRISA2
Bit 2
T0IF
PS2
CPSOUT
TRISA1
Bit 1
INTF
PS1
R/W-1
PS2
TRISA0
T0XCS
RBIF
Bit 0
PS0
x = Bit is unknown
R/W-1
0--- 0000
0000 000x
1111 1111
xxxx xxxx
1111 1111
POR, BOR
PS1
Value on
DS41341E-page 113
0--- 0000
0000 000x
1111 1111
uuuu uuuu
1111 1111
R/W-1
Value on
all other
PS0
Resets
bit 0
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