AC164112 Microchip Technology, AC164112 Datasheet - Page 186
![VOLTAGE LIMITER MPLAB ICD2 VPP](/photos/8/95/89583/ac164112_sml.jpg)
AC164112
Manufacturer Part Number
AC164112
Description
VOLTAGE LIMITER MPLAB ICD2 VPP
Manufacturer
Microchip Technology
Datasheet
1.AC164112.pdf
(302 pages)
Specifications of AC164112
Accessory Type
Voltage Limiter
Product
Cable Assemblies
Features
Programming And Debugging The Latest PIC12/PIC16/PIC18 Products
Development Tool Type
Hardware - Eval/Demo Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MPLAB®
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With
MPLAB ICD 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AC164112
Manufacturer:
Microchip Technology
Quantity:
135
- Current page: 186 of 302
- Download datasheet (5Mb)
PIC16F72X/PIC16LF72X
REGISTER 17-3:
DS41341E-page 186
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
Note 1: When this mode is selected, any reads or writes to the SSPADD SFR address accesses the SSPMSK register.
WCOL
R/W-0
2: When enabled, these pins must be properly configured as input or output using the associated TRIS bit.
WCOL: Write Collision Detect bit
1 = The SSPBUF register is written while it is still transmitting the previous word (must be cleared in
0 = No collision
SSPOV: Receive Overflow Indicator bit
1 = A byte is received while the SSPBUF register is still holding the previous byte. SSPOV is a “don’t
0 = No overflow
SSPEN: Synchronous Serial Port Enable bit
1 = Enables the serial port and configures the SDA and SCL pins as serial port pins
0 = Disables serial port and configures these pins as I/O port pins
CKP: Clock Polarity Select bit
1 = Release control of SCL
0 = Holds clock low (clock stretch). (Used to ensure data setup time.)
SSPM<3:0>: Synchronous Serial Port Mode Select bits
0110 = I
0111 = I
1000 = Reserved
1001 = Load SSPMSK register at SSPADD SFR Address
1010 = Reserved
1011 = I
1100 = Reserved
1101 = Reserved
1110 = I
1111 = I
SSPOV
R/W-0
software)
care” in Transmit mode. SSPOV must be cleared in software in either mode.
SSPCON: SYNCHRONOUS SERIAL PORT CONTROL REGISTER (I
2
2
2
2
2
C Slave mode, 7-bit address
C Slave mode, 10-bit address
C Firmware Controlled Master mode (Slave Idle)
C Slave mode, 7-bit address with Start and Stop bit interrupts enabled
C Slave mode, 10-bit address with Start and Stop bit interrupts enabled
W = Writable bit
‘1’ = Bit is set
SSPEN
R/W-0
R/W-0
CKP
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SSPM3
R/W-0
(1)
SSPM2
R/W-0
© 2009 Microchip Technology Inc.
x = Bit is unknown
SSPM1
R/W-0
(2)
2
C MODE)
SSPM0
R/W-0
bit 0
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