TWR-MEM Freescale Semiconductor, TWR-MEM Datasheet - Page 5

• Manufacturer Part Number: TWR-MEM
• Description: MEMORY MODULE FOR TWR SYSTEM
• Manufacturer: Freescale Semiconductor

Specifications of TWR-MEM

• Accessory Type: Memory Extension Card
• Product: Microcontroller Modules
• Data Bus Width: 8 bit
• Interface Type: JTAG, SPI
• Flash: 1 MB
• Operating Supply Voltage: 3.3 V
• Silicon Manufacturer: Freescale
• Core Architecture: Coldfire
• Core Sub-architecture: Coldfire V1, Coldfire V2, Coldfire V3
• Silicon Core Number: MCF51, MCF52, MCF53
• Rohs Compliant: Yes
• For Use With/related Products: Freescale Tower System
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3 Hardware Features
This section provides more details about the features and functionality of the TWR-MEM.
3.1 Power Supply
The TWR-MEM is powered from a source in an assembled Tower System via the 3.3V supply on the
Primary Elevator Connector.
3.2 Serial Flash
An 8 Megabit (1 Mbyte) SPI Serial Flash is connected to the SPI0 interface of the Primary Elevator
Connector. There are several configuration options that are controllable by jumper options J4 and
J14. Refer to Table 3 “TWR-MEM Jumper Table “for details.
3.3 MRAM
An Everspin 512 Kbyte (256K x 16) magnetoresistive random access memory (MRAM) is connected to
the External Bus Interface on the Primary Elevator Connector. The MRAM provides an SRAM
compatible interface with non-volatile data.
There are a few configurable options on the MRAM interface controlled by shunt jumpers. Removing
the shunt jumper on J10 allows the EBI chip-select, EBI_CS0_b, to be isolated from the MRAM to avoid
conflicts with other EBI devices on the TWR-MEM (e.g. the CPLD/Compact Flash interface) or another
Tower Module. EBI_CS0_b is connected to the MRAM’s select signal by default. However, if
EBI_CS0_b is selected to control the CPLD/Compact Flash interface (using J16), the shunt on J10 should
be removed to avoid selecting both the MRAM and CPLD at the same time.
Additionally the MRAM can be write-protected by removing the shunt jumper on J15. This will isolate
the MRAM’s write-enable signal and the pull-device device will drive the signal to the read-only mode.
Refer to Table 3 for all of the configurable options on the TWR-MEM interfaces.
3.4 SD Card
The Tower System defines a Secure Digital interface as shown in Table 1. The SD Card interface is
multiplexed over the SPI1 signals and four GPIOs such that the host can communicate with the SD
memory or I/O (SDIO) card in the SD Card slot using the SPI mode or the one- or four-bit SD mode.
TWR-MEM Schematics
TWR-MEM Quick Start Guide
Altera Max II CPLD Datasheet (EPM240GT100C3N)
Altera Max II CPLD Product Website
Everspin 4Mb MRAM Datasheet (MR2A16ACYS35)
Atmel SPI Flash Datasheet (AT26DF081A-SU)
TWR-MEM User’s Manual
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