45111 Parallax Inc, 45111 Datasheet - Page 154

• Manufacturer Part Number: 45111
• Description: MANUAL FOR SX-KEY/BLITZ VER. 2.0
• Manufacturer: Parallax Inc

Specifications of 45111

• Accessory Type: Manual
• Product: Microcontroller Accessories
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Parallax microcontroller
• For Use With: 70002PAR - GUIDE PROG THE SX MICRO -DAUBACH
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

15 Appendix E: SX Data Sheet
(JMP). This is necessary to achieve computed jumps and subroutine calls across page boundaries in code
memory. Only 11 bits are used in SX20/28 parts. See The Jump Instruction for examples detailing how
the program counter and the STATUS register are used in typical situations.
15.2.8 STATUS Register ($03)
This register holds the arithmetic status of the ALU, the page select bits, and the reset status. The status
register is accessible during run-time but the reset bits, PD and TO, are read only. Care should be used
when writing to the STATUS register as the ALU status bits will be updated upon completion of the
write operation thereby leaving the STATUS register with a result that is different than intended.
Therefore, it is recommended that only SETB, CLRB and PAGE instructions be used on this register.
Bits 7-5:
Bit 4:
Bit 3:
Bit 2:
Page 154 SX-Key/Blitz Development System Manual 2.0 Parallax, Inc.
Page select bits (PA2:PA0) *
000 = Page 0 ($000 - $1FF)
001 = Page 1 ($200 - $3FF)
010 = Page 2 ($400 - $5FF)
011 = Page 3 ($600 - $7FF)
100 = Page 4 ($800 - $9FF)
101 = Page 5 ($A00 - $BFF)
110 = Page 6 ($C00 - $DFF)
111 = Page 7 ($E00 - $FFF)
Time Out bit (TO)
Set (1) after power up, or executing a CLR !WDT or SLEEP instruction.
Cleared (0) after a watchdog time-out has occurred.
Power Down Bit (PD)
Set (1) after power up, or executing a CLR !WDT instruction.
Cleared (0) by a SLEEP instruction.
Zero Bit (Z)
Set (1) when the result of the most recent math operation was zero.
Cleared (0) when the result of the most recent math operation was non-
zero.
*
For devices of less than 4 K code space, unused bits of PA2:PA0 may
be used as general purpose read/write bits.
PA2
7
PA1
6
PA0
5
TO
4
STATUS
PD
3
Z
2
DC
1
C
0