45111 Parallax Inc, 45111 Datasheet - Page 170

• Manufacturer Part Number: 45111
• Description: MANUAL FOR SX-KEY/BLITZ VER. 2.0
• Manufacturer: Parallax Inc

Specifications of 45111

• Accessory Type: Manual
• Product: Microcontroller Accessories
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Parallax microcontroller
• For Use With: 70002PAR - GUIDE PROG THE SX MICRO -DAUBACH
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

15 Appendix E: SX Data Sheet
15.3.2.8
EN
OE
Rsvd
RES
15.3.3 Port C Registers
There are four registers used to configure the I/O pins of Port C. The TRIS_C register configures the
data direction of the Port C pins as input or output. The LVL_C register configures the input pins as
TTL or CMOS voltage level. The PLP_C register enables/disables pull up resistors on Port C input pins.
The ST_C register enables/disables the Schmitt-Trigger inputs on Port C input pins. To access these
registers you must first write a particular value to the MODE register. Please refer to
Mode Register to find the values required in the MODE register to access the Port C Registers. Note: All
the bits in the following registers are set to ‘1’ on power up.
15.3.3.1
A bit set to ‘1’ in this register sets the corresponding I/O port pin to input (high z) mode.
A bit set to ‘0’ in this register sets the corresponding I/O port pin to output mode.
15.3.3.2
A bit set to ‘1’ in this register sets the input level of the corresponding port pin to TTL.
A bit set to ‘0’ in this register sets the input level of the corresponding port pin to CMOS.
Page 170 SX-Key/Blitz Development System Manual 2.0 Parallax, Inc.
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CMP_B – Comparator Enable Register
TRIS_C – Data Direction Register
LVL_C - TTL/CMOS Select Register
Comparator Enable, 0 = enabled, 1 = disabled
Comparator Output Enable, 0 = enabled, 1 = disabled
Reserved for future use
Comparator Result (EN must = 0)
RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0
RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0
EN
7
7
7
OE Rsvd Rsvd Rsvd Rsvd Rsvd RES
6
6
6
5
5
5
TRIS_C
CMP_B
4
4
4
LVL_C
3
3
3
2
2
2
1
1
1
0
0
0
Table
32 – SX20/28