27220 Parallax Inc, 27220 Datasheet - Page 195

• Manufacturer Part Number: 27220
• Description: BOOK STAMPWORKS
• Manufacturer: Parallax Inc

Specifications of 27220

• Accessory Type: Booklet
• Product: Microcontroller Accessories
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• For Use With/related Products: StampWorks
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Not applicable / Not applicable

Moving Forward · Page 185
There is a brief period when the Slave device can take control of the SCL line. If a
Slave is not ready to transmit or receive data, it can hold the SCL line low after the
Start condition. The Master can monitor this to wait for the Slave to be ready. At
the speed of the BS2, monitoring the clock line usually isn't necessary but the
capability to monitor “clock hold” is built into the I2C_Start subroutine just to be
safe.
For our experiments we'll be using 7-bit addressing (see figure below) where the
upper seven bits of the slave address byte contain the device type and address, and
bit zero holds the data direction: "0" indicating a device write; "1" indicating a device
read. What follows the slave address will vary, depending on the device and the
type of request. Most I2C devices have one or two address bytes which will be
followed by the data byte(s) to write to or read from the device
Data is transferred eight bits at a time, sending the MSB first. After each byte, the
I2C specification calls for the receiving device to acknowledge the transmission by
bringing the bus low for the ninth clock. The exception to this is when the Master is
the receiver and is receiving the final byte from the Slave. In this case, there is no
Acknowledge bit sent from Master to Slave.
Sending and receiving data from a specific slave always requires a Start condition,
sending the Slave address and finally, the Stop condition. What happens between