DM-COP8/28D National Semiconductor, DM-COP8/28D Datasheet - Page 161
![no-image](/images/manufacturer_photos/0/4/469/national_semiconductor_sml.jpg)
DM-COP8/28D
Manufacturer Part Number
DM-COP8/28D
Description
CABLE FOR DEBUG MODULE 28-DIP
Manufacturer
National Semiconductor
Datasheet
1.DM-COP820D.pdf
(254 pages)
Specifications of DM-COP8/28D
Accessory Type
28-DIP Target Cable
For Use With/related Products
MetaLink Debug Module
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*DM-COP8/28D
- Current page: 161 of 254
- Download datasheet (2Mb)
DIVIDE (16 16) SUBROUTINE
DIVIDEND IN [3,2]
DIVISOR IN [1,0]
QUOTIENT IN [3,2]
REMAINDER IN [5,4]
CNTR:
DIV:
LSHFT:
TSUBT:
SUBT:
TEST:
With a division where the dividend is larger than the divisor (relative to the number of
bytes), an additional test step must be added. This test determines whether a high-order
carry is generated from the left shift of the dividend through the test window. When this
carry occurs, the program branches directly to the SUBT subtract routine. This carry can
occur only if the divisor contains a high-order bit. Moreover, the divisor must also be
larger than the shifted dividend when the shift has placed a high-order bit in the test
window. When this case occurs, the TSUBT test subtract shows the divisor to be larger
than the shifted dividend and no real subtraction occurs. Consequently, the high-order
bit of the shifted dividend is again left shifted and results in a high-order carry. This test
is illustrated in the following program for a 24-by-8-bit binary division.
.SECT
.DSB 1
.SECT
LD
LD
LD
LD
LD
RC
LD
LD
ADC
X
LD
ADC
X
LD
ADC
X
LD
ADC
X
SC
LD
LD
SUBC
LD
LD
SUBC
IFNC
JP
LD
LD
SUBC
X
LD
LD
SUBC
X
LD
SBIT
DRSZ
JMP
RET
MEMCNT, REG
CODE, ROM
CNTR,#16
B,#5
[B-],#0
[B],#0
X,#4
B,#2
A,[B]
A,[B]
A,[B+]
A,[B]
A,[B]
A,[B+]
A,[B]
A,[B]
A,[B+]
A,[B]
A,[B]
A,[B+]
B,#0
A,[X+]
A,[B]
B,#1
A,[X-]
A,[B]
TEST
B,#0
A,[X]
A,[B]
A,[X+]
B,#1
A,[X]
A,[B]
A,[X-]
B,#2
0,[B]
CNTR
LSHFT
COP8SAx7 MICROCONTROLLER
2-123
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