EVB-USB2524 SMSC, EVB-USB2524 Datasheet - Page 41

BOARD EVAL USB2524 SHARE/SWITCH

EVB-USB2524

Manufacturer Part Number
EVB-USB2524
Description
BOARD EVAL USB2524 SHARE/SWITCH
Manufacturer
SMSC
Series
MultiSwitch™r
Datasheets

Specifications of EVB-USB2524

Main Purpose
Interface, USB 2.0 Hub
Embedded
No
Utilized Ic / Part
USB2524
Primary Attributes
Quad Port Hub, High Speed (480Mbps), SMBus
Secondary Attributes
Overcurrent Protection, Port Power Switching, Multi-TT Enabled
Interface Type
USB
Operating Supply Voltage
5 V
Product
Interface Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
USB2524
Other names
638-1044

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EVB-USB2524
Manufacturer:
SMSC
Quantity:
135
USB MultiSwitch
Datasheet
SMSC USB2524
7.3.1
7.3.1.1
7.3
Byte Count = N
S
1
8
Slave Address
Instead of loading User-Defined Descriptor data from an external EEPROM, the SMSC Hub can be
configured to receive a code load from an external processor via an SMBus interface. The SMBus
interface shares the same pins as the EEPROM interface, if CFG_SEL2, CFG_SEL1 & CFG_SEL0
activates the SMBus interface, external EEPROM support is no longer available (and the user-defined
descriptor data must be downloaded via the SMBus). Due to system issues, the SMSC Hub waits
indefinitely for the SMBus code load to complete and only “appears” as a newly connected device on
USB after the code load is complete.
The Hub’s SMBus implementation is a subset of the SMBus interface to the host. The device is a
slave-only SMBus device. The implementation in the device is a subset of SMBus since it only supports
two protocols. The Write Block and Read Block protocols are the only valid SMBus protocols for the
Hub. The Hub responds to other protocols as described in
42. Reference the System Management Bus Specification, Rev 1.0.
The SMBus interface is used to read and write the registers in the device. The register set is shown
in
Bus Protocols
Typical Write Block and Read Block protocols are shown below. Register accesses are performed
using 7-bit slave addressing, an 8-bit register address field, and an 8-bit data field. The shading
indicates the Hub driving data on the SMBDATA line; otherwise, host data is on the SDA/SMBDATA
line.
The slave address is the unique SMBus Interface Address for the Hub that identifies it on SMBus. The
register address field is the internal address of the register to be accessed. The register data field is
the data that the host is attempting to write to the register or the contents of the register that the host
is attempting to read.
Data bytes are transferred MSB first (msb first).
Block Read/Write
The Block Write begins with a slave address and a write condition. After the command code the host
issues a byte count which describes how many more bytes will follow in the message. If a slave had
20 bytes to send, the first byte would be the number 20 (14h), followed by the 20 bytes of data. The
byte count may not be 0. A Block Read or Write is allowed to transfer a maximum of 32 data bytes.
For the following SMBus tables:
SMBus Slave Interface
TM
,
Hub
Internal Register Set (Common to EEPROM and SMBus) on page
7
A
1
Denotes Master-to-Slave
Data byte 1
8
Wr
1
Figure 7.1 SMBus Block Write
A
1
A
1
DATASHEET
Block Write
Register Address
Data byte 2
41
8
8
Denotes Slave-to-Master
1
A
Invalid Protocol Response Behavior on page
A
1
...
20.
Data byte N
8
Revision 1.91 (08-22-07)
1
A
P
1

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