CDB5463U Cirrus Logic Inc, CDB5463U Datasheet - Page 17

• Manufacturer Part Number: CDB5463U
• Description: BOARD EVAL & SOFTWARE CS5463 ADC
• Manufacturer: Cirrus Logic Inc
• Type: A/Dr

Specifications of CDB5463U

• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: CS5463
• Primary Attributes: 1-Phase, Energy-to-Frequency Output
• Secondary Attributes: GUI, USB, SPI Interfaces
• Product: Data Conversion Development Tools
• Maximum Clock Frequency: 4 MHz
• Interface Type: USB
• Supply Voltage (max): 5 V
• Supply Voltage (min): 3.3 V
• For Use With/related Products: CS5463
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 598-1553

for unsigned registers is a normalized value between 0
and 1. A register value of
represents the maximum possible value.
At each instantaneous measurement, the CRDY bit will
be set in the Status Register , and the INT pin will be-
come active if the CRDY bit is unmasked in the Mask
Register . At the end of each computation cycle, the
DRDY bit will be set in the Status Register , and the INT
pin will become active if the DRDY bit is unmasked in
the Mask Register . When these bits are asserted, they
must be cleared before they can be asserted again.
If the Cycle Count Register (N) is set to 1, all output cal-
culations are instantaneous, and DRDY, like CRDY, will
indicate when instantaneous measurements are fin-
ished. Some calculations are inhibited when the cycle
count is less than 2.
Epsilon (
the sample frequency (f
where f
and clock divider K = 1, f
most-common line frequencies, 50 Hz and 60 Hz
and
respectively. Epsilon is used to set the frequency of the
internal sine/cosine reference for the fundamental ac-
tive and reactive measurements, and the gain of the 90°
phase shift (IIR) filter for the average reactive power.
5.5 Energy Pulse Output
The CS5463 provides three output pins for energy reg-
istration. By default, E1 registers active energy, E3 reg-
isters reactive energy, and E2 indicates the sign of both
active and reactive energy. (See Figure 2.
gram for E1, E2, and E3
put is designed to register the Active Energy. The E2 pin
can be set to register Apparent Energy. Table 2 defines
DS678F2
s
ε
= MCLK / (K*1024). With MCLK = 4.096 MHz
) is the ratio of the input line frequency (f
ε
ε
=
(
----------------------- -
=
2
50 Hz 4000 Hz
23
2
60 Hz 4000 Hz
23
–
1
s
)
ε
) of the ADC.
⁄
on page13.) The E1 pulse out-
⁄
=
=
0.99999988
s
f
i
= 4000 Hz. For the two
⁄
f
s
=
=
0.0125
0.015
Timing Dia-
i
) to
Figure 5. Active and Reactive energy pulse outputs
the pulse output mode, which is controlled by bit
E2MODE in the Operational Mode Register.
The E3 pin can be set to register Reactive Energy (de-
fault), PFMON, Voltage Channel Sign, or Apparent En-
ergy. Table 3 defines the pulse output format, which is
controlled by bits E3MODE[1:0] in the Operational
Mode Register.
The pulse output frequency of E1, E2, and E3 is directly
proportional to the power calculated from the input sig-
nals. The value contained in the PulseRateE Register is
the ratio of the frequency of energy-output pulses to the
number of samples, at full scale, which defines the av-
erage frequency for the output pulses. The pulse width,
t
Width register, and is approximately equal to:
If MCLK =
t
5.5.1 Active Energy
The E1 pin produces active-low pulses with an output
frequency proportional to the active power. The E2 pin
is the energy direction indicator. Positive energy is rep-
resented by E1 pin falling while the E2 is high. Negative
energy is represented by the E1 pin falling while the E2
is low. The E1 and E2 switching characteristics are
specified in Figure 2.
on page13.
Figure 5 illustrates the pulse output format with positive
active energy and negative reactive energy.
pw
pw
E 1
E 2
E 3
E3MODE1 E3MODE0
≅
in Figure 2, is programmable through the Pulse-
0.25
0
0
1
1
E2MODE
t pw sec
ms.
4.096
Table 2. E2 Pin Configuration
Table 3. E3 Pin Configuration
(
0
1
)
MHz, K =
≅
PulseWidth
0
1
0
1
Timing Diagram for E1, E2, and E3
E2 Output Mode
Apparent Energy
Sign of Energy
1, and PulseWidth = 1,
•
Voltage Channel Sign
----------------------------------------------- -
( MCLK/K ) / 1024
E3 OutPut Mode
Apparent Energy
Reactive Energy
PFMON
1
CS5463
then
17