CY3253-BLDC Cypress Semiconductor Corp, CY3253-BLDC Datasheet
CY3253-BLDC
Specifications of CY3253-BLDC
Related parts for CY3253-BLDC
CY3253-BLDC Summary of contents
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... CY3253-BLDC DEMO KIT Design Note CY3253 Design Note Ver1.0 Rev A Page ...
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... CH1. BLDC C B ONTROL ACKGROUND CH2. BLDC C WITH HALL SENSOR ONTROL CH3. B EMF Z -C ACK ERO ROSSING CH4. CY3253 K BEMF ERO CROSSING CH5 EMF ERO CROSSING CH6. BEMF ERO CROSSING ETECTION CH7 ONFIGURE ULTI UNCTIONAL BLDC ..................................................................................................................... 14 CH8 REE UNNING TAGE OF CH9 ...
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... EMF (sensorless control). When the motor is spinning, the permanent magnet rotor moving past the stator coils induces an electrical potential in the coils called Back Electromotive Force, or BEMF. BEMF is directly proportional to the motor speed. CY3253 Design Note Figure1 BLDC BEMF and Current WaveForm Page ...
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... HALL sensor. CY3253 kit supports both sensored control and sensorless control. The two control scenarios share the same HW resource. Please refer to Cypress Application Notes AN42102 more detail. ...
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... Assuming that phase C is the non-fed phase it is possible to write the following equations for the three terminal voltages RIa + L( dIa/dt RIb + L (dIb/dt only two currents flow in the stator windings at any one time, two phase currents are equal and opposite. Therefore, CY3253 Design Note ...
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... Sample at PWM-Off time Assuming at a particular step, phase A and B are conducting current, and phase C is floating. The high-side switch of phase A is controlled by the PWM and the low-side switch of phase during the whole step. The terminal voltage Vc is measured. CY3253 Design Note (4) (5) (6) Page ...
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... So, to detect zero crossing of backEMF Ec, just need to sample terminal voltage Vc and compare it with half of DC bus. Sample with filter In some applications, filters are using to eliminate PWM signals. In such circumstances Dp* Vdc Here duty-cycle of PWM signal. Combine (9) and (6) CY3253 Design Note 3Ec = 2Vc Va = Vdc 3Ec = 2Vc – Vdc (7) (8) (9) ...
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... Compare Filtered Terminal Voltage with Compensated Voltage These algorithms either need a high speed ADC or external PWM latch circuit. Thanks for versatility of PSoC chip, CY3253 kit implements a BEMF zero-crossing detection algorithm - Terminal Voltage Compared with Half Bus-Voltage via internal PWM Synced sample/hold circuit. ...
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... A delay can be added after PWM rising edge to disable the influence from power devices current transition. • A comparator to compare the analog signal after synchronous sampling circuit with the DC bus scale down voltage. Then output the signal without PWM carrier waveform to indicate the commutation. CY3253 Design Note Page ...
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... C1; when PWM off, the voltage on C1 keeps same. -The demodulated BEMF is compared with half Bus-Voltage by an external comparator obvious that the output signal out the comparator is the BEMF zero- crossing signal. Then, PSoC chip samples the BEMF zero-crossing signal via a GPIO pin. CY3253 Design Note Page ...
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... In ideal cases, according to figure1, the zero-crossing of BEMF is happened 30 electrical degrees after last commutation and 30 electrical degrees before the next commutation. Hence, when a zero-crossing checked electrical degrees delay time should be memorized to evoke next commutation. A Timer16 user module does this work. CY3253 Design Note Page ...
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... In this design， one free-running 16-bit timer is used to timestamp the event calculate the period. The clock frequency of Timer16 is 1MHz, with a high input clock frequency, we can get better resolution when period measurement. Meanwhile, a 16- bit resolution will make sure that the period measurement will be not overflow. CY3253 Design Note Page ...
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... First, enable the “Terminal Count” interrupt. Use another variable to identify this ISR. Second, in this “Terminal Count” ISR, enable “Compare True” interrupt by setting relative register. When next interrupt occurred, PSoC will jump to use desired ISR. Figure 8 shows this trick. CY3253 Design Note Page ...
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... FW will enter into normal synchronous running stage can’t detect enough valid zero-crossing event during a period of time, an error is generated and BLDC have to stop and waiting for next round of free-running stage. CY3253 Design Note Figure8 Time16 Count Flow Page ...
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... If increasing the sector one by one lets the rotor rotating in clockwise direction, then decreasing the sector one by one will rotate the rotor in Counter-ClockWise(CCW) direction. Figure 1&9 illustrates the relationship. It should be notified that the zero- crossing edge (falling/rising) is reversed when direction changed. Figure9 Senorless BLDC CCW Commutation CY3253 Design Note Page ...
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... To execute a multiply, write the value to any internal multiplicand register. Immediately after the write of the multiplicand, the product is available at product registers. The Multiply Accumulate calculation has the same operation. The MAC block is a very useful resource for the PI algorithm. CY3253 Design Note − ∑ ...
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... Source |----Library Headers |----External Headers |----flashsecurty.txt CY3253 Design Note ….. M8C Boot Code for CY8C24xxxB controller family ….. BLDC commutation control function ….. Stepping BLDC for initial zerocross event checking ….. Detecting key events on key_mode&key_start ….. Main function ….. Assign PWM to different I/Os on different ports … ...
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... FW FlowChart – MainLoop CY3253 Design Note Figure 11 Firmware FlowChart Page ...
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... CH12. OVER CURRENT PROTECTION As the CY8C24533 resource limitation, CY3253 kit implements over current protection by external hardware circuit. Figure12 Over Current Protection Circuit As shown in figure 12, R44 is the current shunt resistor. OC_Hall signal, which is amplified bus current signal, is compared with a reference voltage via a comparator. ...
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... A. Terminal Voltage VS Filtered BEMF The yellow curve is one channel terminal voltage, and green one is filtered BEMF of three channels. Figure14 Terminal Voltage VS Filtered BEMF Terminal Voltage VS Zero-Crossing B. The yellow curve is one channel terminal voltage, and green one is filtered BEMF of three channels. CY3253 Design Note Page ...
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... Figure15 Terminal Voltage VS Zero-Crossing CY3253 Design Note Page ...
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... CH14. APPENDIX 14.1 System Diagram DC 24V Shunt Resistor IGBT driver 3 x IR2101 LED 6 PWM LCD CY8C24533 IO LED CY3253 Design Note +5V BEMF Signal & Bus Voltage condition Jumpers 3 Analog I/O PSoC – IO Buttons U BLDC V Motor W GND +5V HALL 5V & 15V power supply ...
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... Schematic CY3253 Design Note Page ...
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... A Novel Direct Back EMF Detection for Sensorless Brushless DC (BLDC) Motor Drives, Jianwen Shao, Dennis Nolan, and Thomas Hopkins, ST MicroElectronics 5. Commutation Trigger for BLDC Drive, DCS Group, Texas Instrument 6. JHU#033, Cypress Internal Correspondence 7. QDGU#003, Cypress Internal Correspondence 8. QDGU#010, Cypress Internal Correspondence 9. QDGU#019, Cypress Internal Correspondence CY3253 Design Note Page ...