SI3215MPPQX-EVB Silicon Laboratories Inc, SI3215MPPQX-EVB Datasheet - Page 107

• Manufacturer Part Number: SI3215MPPQX-EVB
• Description: BOARD EVAL W/DISCRETE INTERFACE
• Manufacturer: Silicon Laboratories Inc
• Series: ProSLIC®r

Specifications of SI3215MPPQX-EVB

• Main Purpose: Interface, Analog Front End (AFE)
• Utilized Ic / Part: Si3215
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5. Pin Descriptions: Si3215
Pin #
QFN
35
36
37
38
1
2
3
4
TSSOP
Pin #
2
4
1
3
5
6
7
8
SRINGDC
STIPDC
FSYNC
RESET
QGND
FSYNC
RESET
SDCH
CAPM
CAPP
SDCL
Name
SDCH
PCLK
V
IREF
DRX
DTX
DTX
INT
CS
DDA1
10
11
12 13
1
2
3
4
5
6
7
8
9
38
Chip Select.
Active low. When inactive, SCLK and SDI are ignored and SDO is high impedance.
When active, the serial port is operational.
Interrupt.
Maskable interrupt output. Open drain output for wire-ORed operation.
PCM Bus Clock.
Clock input for PCM bus timing.
Receive PCM Data.
Input data from PCM bus.
Transmit PCM Data.
Output data to PCM bus.
Frame Synch.
8 kHz frame synchronization signal for the PCM bus. May be short or long pulse for-
mat.
Reset.
Active low input. Hardware reset used to place all control registers in the default
state.
DC Monitor.
DC-DC converter monitor input used to detect overcurrent situations in the con-
verter.
14
37
15 16 17 18 19
QFN
36
35
34 33 32
31
30
29
28
27
26
25
24
23
22
21
20
SDITHRU
DCDRV
DCFF
GNDD
ITIPN
ITIPP
IRINGP
IRINGN
IGMP
TEST
VDDD
V
DDA2
Rev. 0.92
Description
SRINGDC
SRINGE
STIPDC
FSYNC
RESET
SVBAT
QGND
STIPE
CAPM
SDCH
CAPP
PCLK
SDCL
V
IREF
DRX
DTX
DDA1
INT
CS
1
10
11
12
13
14
15
16
17
18
19
2
3
4
5
6
7
8
9
TSSOP
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
SCLK
SDI
SDO
SDITHRU
DCDRV
DCFF
TEST
GNDD
ITIPN
ITIPP
V
IRINGP
IRINGN
IGMP
GNDA
IGMN
SRINGAC
STIPAC
VDDD
DDA2
Si3215
107