SI3215MPPQX-EVB Silicon Laboratories Inc, SI3215MPPQX-EVB Datasheet - Page 27

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SI3215MPPQX-EVB

Manufacturer Part Number
SI3215MPPQX-EVB
Description
BOARD EVAL W/DISCRETE INTERFACE
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheet

Specifications of SI3215MPPQX-EVB

Main Purpose
Interface, Analog Front End (AFE)
Utilized Ic / Part
Si3215
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
2.2.5. Power Monitoring and Line Fault Detection
In addition to reporting voltages and currents, the
ProSLIC continuously monitors the power dissipated in
each external bipolar transistor. Real time output power
of any one of the six linefeed transistors can be read by
setting the power monitor pointer (direct Register 76) to
point to the desired transistor and then reading the line
power output monitor (direct Register 77).
The real time power measurements are low-pass
filtered and compared to a maximum power threshold.
Maximum power thresholds and filter time constants are
software-programmable and should be set for each
transistor pair based on the characteristics of the
transistors used. Table 23 describes the registers
associated with this function. If the power in any
external transistor exceeds the programmed threshold,
a power alarm event is triggered. The ProSLIC sets the
Power Alarm register bit, generates an interrupt (if
enabled), and automatically enters the Open state (if
AOPN = 1).
transistors from fault conditions and, combined with the
loop voltage and current monitors, allows diagnosis of
Power Alarm Threshold, Q1 & Q2
Power Alarm Threshold, Q3 & Q4
Power Alarm Threshold, Q5 & Q6
Power Alarm Interrupt Pending
Thermal LPF Pole, Q1 & Q2
Thermal LPF Pole, Q3 & Q4
Thermal LPF Pole, Q5 & Q6
Line Power Monitor Output
Power Monitor Pointer
Parameter
This
Table 23. Associated Power Monitoring and Power Fault Registers
feature
protects
spond to Q1 to Q6,
to Q6, respectively
0 to 5 points to Q1
0 to 0.9 W for Q3,
0 to 7.8 W for Q1,
Bits 2 to 7 corre-
Description/
the
respectively
Q2, Q5, Q6
0 to 7.8 W
0 to 0.9 W
0 to 7.8 W
Range
See equation above.
See equation above.
See equation above.
Q4
external
Rev. 0.92
the type of fault condition present on the line.
The value of each thermal low-pass filter pole is set
according to the equation:
where τ is the thermal time constant of the transistor
package; 4096 is the full range of the 12-bit register, and
800 is the sample rate in Hertz. Generally, τ = 3
seconds for SOT223 packages and τ = 0.16 seconds
for SOT23, but check with the manufacturer for the
package thermal constant of a specific device. For
example, the power alarm threshold and low-pass filter
values for Q5 and Q6 using a SOT223 package
transistor are computed as follows:
Thus, indirect Register 21 should be set to 150Dh.
Note: The power monitor resolution for Q3 and Q4 is different
PT56
Resolution
30.4 mW
3.62 mW
30.4 mW
3.62 mW
30.4 mW
from that of Q1, Q2, Q5, and Q6.
N/A
N/A
=
------------------------------ -
Resolution
thermal LPF register
P
MAX
PWROM[7:0]
PWRMP[2:0]
where n = 1
QnAP[n+1],
PPT12[7:0]
PPT34[7:0]
PPT56[7:0]
NQ12[7:0]
NQ34[7:0]
NQ56[7:0]
Register
×
Bits
to 6
2
7
=
----------------- -
0.0304
1.28
=
------------------
800 τ
Indirect Register 19
Indirect Register 20
Indirect Register 21
Indirect Register 24
Indirect Register 25
Indirect Register 26
×
Direct Register 76
Direct Register 77
Direct Register 19
4096
2
7
×
Location*
=
Si3215
×
5389
2
3
=
150D
27

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