SI5367/68-EVB Silicon Laboratories Inc, SI5367/68-EVB Datasheet - Page 10
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SI5367/68-EVB
Manufacturer Part Number
SI5367/68-EVB
Description
BOARD EVAL FOR SI5367/68
Manufacturer
Silicon Laboratories Inc
Specifications of SI5367/68-EVB
Main Purpose
Timing, Clock Generator
Utilized Ic / Part
SI5367, SI5368
Processor To Be Evaluated
Si5367 and Si5368
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Si5365/66-EVB
Si5367/68-EVB
J17 is a three-pin by twenty header that is used to establish input levels for the pin controlled three-level inputs
using jumper plugs. It also provides a means of externally driving the three-level input signals.
J18 is used to monitor the Any-Rate Precision Clock voltage.
J1 and J2 are edge mount SMA connectors that are used, if so configured, to supply an external single-ended or
differential 38.88 MHz reference oscillator.
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Table 7. Three-Level Input Jumper Headers, J17
Table 6. External Serial Port Connector, J22
J17.10B
J17.11B
J17.12B
J17.13B
J17.14B
J17.15B
J17.16B
J17.17B
J17.18B
J17.19B
J17.20B
J17.1B
J17.2B
J17.3B
J17.4B
J17.5B
J17.6B
J17.7B
J17.8B
J17.9B
J39
J22.1
J22.3
J22.5
J22.7
J22.9
J38
SCL_SCLK_BWSEL0
SDA_SDO_BWSEL1
A2_SS_FRQSEL2
SDI_FRQSEL3
DUT_RST_B
A0_FRQSEL0
A1_FRQSEL1
SCL_SCLK
SDA_SDO
AUTOSEL
BDBL_FS
FOS_CTL
DBL2_BY
A2_SS
FRQTBL
SFOUT0
SFOUT1
DIV34_0
DIV34_1
CMODE
RATE0
RATE1
SDI
Pin
Rev. 0.4
Pin
—
—
Comment
reset
Comment
not used
not used