SI5367/68-EVB Silicon Laboratories Inc, SI5367/68-EVB Datasheet - Page 9

• Manufacturer Part Number: SI5367/68-EVB
• Description: BOARD EVAL FOR SI5367/68
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5367/68-EVB

• Main Purpose: Timing, Clock Generator
• Utilized Ic / Part: SI5367, SI5368
• Processor To Be Evaluated: Si5367 and Si5368
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

J14 is a three-pin by ten header that is used to establish input levels for the pin controlled two-level inputs using
jumper plugs. It also provides a means of externally driving the two-level input signals:
J8 is a 20 pin ribbon header that provides an external path to monitor the status pins.
J22 is a 10 pin ribbon header that provides an external path to serially communicate with the Any-Rate Precision
Clock.
To control the Any-Rate part that is on the Evaluation Board from an external serial port, open the Register
Programmer, connect to the Evaluation Board, go to Options in the top toolbar and select "Switch To External
Control Mode".
To control an Any-Rate part that is on an external target board from the Evaluation Board using its serial port, tie
pin 9 of J22 low so that the on-board Any-Rate part is constantly being held in reset. This will force it to disable its
SDA_SDO output buffer. This will work only for Evaluation Boards that have Rev C or higher Any-Rate parts.
Table 4. Two-Level Input Jumper Header, J14
Table 5. External Status Connector, J8
J14.10B
J14.1B
J14.2B
J14.3B
J14.4B
J14.5B
J14.6B
J14.7B
J14.8B
J14.9B
J8.13
J8.15
J8.17
J8.19
J8.11
J8.1
J8.3
J8.5
J8.7
J8.9
J37
J36
FS_ALIGN
INT_ALRM
DUT_PWR
CK_CONF
CS0_C3A
CS1_C4A
CS0_C3A
CS1_C4A
DSBL34
FS_SW
Rev. 0.4
DEC
LOL
C1B
C2B
C3B
C1A
C2A
INC
Pin
Pin
—
—
Comment
Comment
not used
not used
CS0
CS1
C3A
C4A
Si5367/68-EVB
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