DS26528DK Maxim Integrated Products, DS26528DK Datasheet - Page 147

• Manufacturer Part Number: DS26528DK
• Description: KIT DESIGN FOR DS26528
• Manufacturer: Maxim Integrated Products

Specifications of DS26528DK

• Main Purpose: Telecom, Framer and Line Interface Units (LIUs)
• Utilized Ic / Part: G575DS26528
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: This register has an alternate definition for T1 mode. See T1RIBCC.
Bit 7: Sa8 Bit Select (RSa8S). Set to one to have RLCLK pulse at the Sa8 bit position; set to zero to force RLCLK
low during Sa8 bit position.
Bit 6: Sa7 Bit Select (RSa7S). Set to one to have RLCLK pulse at the Sa7 bit position; set to zero to force RLCLK
low during Sa7 bit position.
Bit 5: Sa6 Bit Select (RSa6S). Set to one to have RLCLK pulse at the Sa6 bit position; set to zero to force RLCLK
low during Sa6 bit position.
Bit 4: Sa5 Bit Select (RSa5S). Set to one to have RLCLK pulse at the Sa5 bit position; set to zero to force RLCLK
low during Sa5 bit position.
Bit 3: Sa4 Bit Select (RSa4S). Set to one to have RLCLK pulse at the Sa4 bit position; set to zero to force RLCLK
low during Sa4 bit position.
Bit 0: Receive Loss of Signal Alternate Criteria (RLOSA). Defines the criteria for a loss-of-signal condition.
0 = LOS declared upon 255 consecutive zeros (125μs)
1 = LOS declared upon 2048 consecutive zeros (1ms)
RSa8S
7
0
E1RCR2 (E1 Mode)
Receive Control Register 2
082h + (200h x n): where n = 0 to 7, for Ports 1 to 8
RSa7S
6
0
RSa6S
5
0
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RSa5S
4
0
RSa4S
3
0
DS26528 Octal T1/E1/J1 Transceiver
—
2
0
—
1
0
RLOSA
0
0