DS26528DK Maxim Integrated Products, DS26528DK Datasheet - Page 71
DS26528DK
Manufacturer Part Number
DS26528DK
Description
KIT DESIGN FOR DS26528
Manufacturer
Maxim Integrated Products
Datasheet
1.DS26528G.pdf
(276 pages)
Specifications of DS26528DK
Main Purpose
Telecom, Framer and Line Interface Units (LIUs)
Utilized Ic / Part
G575DS26528
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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8.10.2 Transmit HDLC Controller
8.10.2.1
The Transmit HDLC FIFO Buffer Available register (TFBA) indicates the number of bytes that can be written into
the transmit FIFO. The count from this register informs the host as to how many bytes can be written into the
transmit FIFO without overflowing the buffer. This is a real-time register. The count shall remain valid and stable
during the read cycle.
8.10.2.2
The HDLC status registers in the DS26528 allow for flexible software interface to meet the user’s preferences.
When transmitting HDLC messages, the host can choose to be interrupt driven, or to poll to desired status
registers, or a combination of polling and interrupt processes can be used. An example routine for using the
DS26528 HDLC receiver is given in
FIFO Information
HDLC Transmit Example
Figure
8-10.
71 of 276
DS26528 Octal T1/E1/J1 Transceiver
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