STEVAL-ISA052V1 STMicroelectronics, STEVAL-ISA052V1 Datasheet - Page 24

KIT EVAL PM6675S HE CTLR 2A REG

STEVAL-ISA052V1

Manufacturer Part Number
STEVAL-ISA052V1
Description
KIT EVAL PM6675S HE CTLR 2A REG
Manufacturer
STMicroelectronics
Datasheets

Specifications of STEVAL-ISA052V1

Main Purpose
DC/DC, Step Down with LDO
Outputs And Type
2, Non-Isolated
Voltage - Output
1.5V, 0.6 ~ 3.3V
Current - Output
10A, 2A
Voltage - Input
4.5 ~ 28 V
Regulator Topology
Buck
Board Type
Fully Populated
Utilized Ic / Part
PM6675
Product
Power Management Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Frequency - Switching
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-8426

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STEVAL-ISA052V1
Manufacturer:
STMicroelectronics
Quantity:
1
Device description
24/53
Figure 35. Circuitry for output ripple compensation
The additional capacitor is used to reduce the voltage on the COMP pin when higher than
300 mVpp and is unnecessary for most of applications. The trans conductance amplifier
(gm) generates a current, proportional to the DC error, used to charge the C
The voltage across the C
forcing the loop to compensate the total static error. An internal voltage clamp forces the
COMP pin voltage range to ±150 mV respect to V
output voltage overshoot during a load transient. When the Pulse-Skip Mode is entered, the
clamping range is automatically reduced to 60 mV in order to enhance the recovering
capability. If the ripple amplitude is larger than 150 mV, an additional capacitor C
connected between the COMP pin and ground to reduce ripple amplitude, otherwise the
integrator will operate out of its linearity range. This capacitor is unnecessary for most of
applications and can be omitted.
The design of the external feedback network depends on the output voltage ripple. If the
ripple is higher than approximately 20 mV, the correct C
keep the loop stable. The stability of the system depends firstly on the output capacitor zero
frequency.
The following condition must be satisfied:
Equation 6
where k is a fixed design parameter (k > 3). It determinates the minimum integrator
capacitor value:
Vr
COMP PIN
VOLTAGE
OUTPUT
VOLTAGE
t
t
∆V
∆V
INT
capacitor feeds the negative input of the PWM comparator,
C
C
f
ESR
ESR
SW
OUT
OUT
C
C
>
FILT
FILT
C
C
R
R
k
INT
INT
INT
INT
f
Zout
COMP
COMP
VSNS
VSNS
=
V
V
C
C
2
INT
INT
⋅ π
REF
C
out
I=g
k
. This is useful to avoid or smooth
m
Vr
Vr
ESR
(V
INT
1
-Vr)
R
R
capacitor is usually enough to
Fb2
Fb2
g
g
V
V
m
m
1
1
+
V
V
REF
REF
R
R
Fb1
Fb1
+
Comparator
-
Comparator
PWM
PWM
INT
capacitor.
FILT
PM6675S
can be

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