ISL8105BEVAL1Z Intersil, ISL8105BEVAL1Z Datasheet - Page 12

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ISL8105BEVAL1Z

Manufacturer Part Number
ISL8105BEVAL1Z
Description
EVAL BOARD ISL8105B
Manufacturer
Intersil
Datasheets

Specifications of ISL8105BEVAL1Z

Main Purpose
DC/DC, Step Down
Outputs And Type
1, Non-Isolated
Voltage - Output
1.8V
Current - Output
15A
Voltage - Input
9.6 ~ 14.4V
Regulator Topology
Buck
Frequency - Switching
300kHz
Board Type
Fully Populated
Utilized Ic / Part
ISL8105B
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
COMPENSATION BREAK FREQUENCY EQUATIONS
Figure 10 shows an asymptotic plot of the Buck converter’s
gain vs. frequency. The actual modulator gain has a high gain
peak dependent on the quality factor (Q) of the output filter,
which is not shown. Using the above guidelines should yield a
compensation gain similar to the curve plotted. The open loop
error amplifier gain bounds the compensation gain. Check the
compensation gain at F
amplifier. The closed loop gain, G
log-log graph of Figure 10 by adding the modulator gain,
G
dB). This is equivalent to multiplying the modulator transfer
function and the compensation transfer function and then
plotting the resulting gain.
A stable control loop has a gain crossing with close to a
-20dB/decade slope and a phase margin greater than +45°.
Include worst case component variations when determining
phase margin. The mathematical model presented makes a
number of approximations and is generally not accurate at
frequencies approaching or exceeding half the switching
G
G
G
F
F
FIGURE 10. ASYMPTOTIC BODE PLOT OF CONVERTER GAIN
Z1
Z2
MOD
MOD
FB
CL
0
LOG
f ( )
f ( )
=
=
20
f ( )
------------------------------ -
2π R
-------------------------------------------------
(in dB), to the feedback compensation gain, G
log
=
=
=
--------------------------------------------------- - ⋅
s f ( ) R
G
R2
------- -
R1
(
1
MOD
------------------------------------------------------------------------------------------------------------------------ -
(
1
R
d
----------------------------- -
2
1
MAX
+
1
V
+
s f ( ) R
+
1
C
OSC
s f ( ) R
f ( ) G
1
1
R
F
Z1
3
V
(
) C
F
C
F
IN
LC
Z2
2
1
FB
1
3
+
P2
3
+
C
---------------------------------------------------------------------------------------------------------- -
1
f ( )
C
C
s f ( )
1
+
against the capabilities of the error
2
F
F
3
s f ( )
)
CE
P1
)
F
F
12
P1
P2
(
20
1
R
F
(
where s f ( )
0
1
+
CL
log
ESR
=
=
+
s f ( ) R
1
, is constructed on the
-------------------------------------------- -
2π R
------------------------------ -
2π R
d
---------------------------------
R
+
MAX V
3
s f ( ) ESR C
V
+
,
F
) C
COMPENSATION GAIN
OSC
OPEN LOOP E/A GAIN
P2
DCR
1
CLOSED LOOP GAIN
G
2
2
3
MODULATOR GAIN
MOD
3
1
-------------------- -
C
C
=
C
IN
G
FREQUENCY
-------------------- -
C
) C
C
3
1
CL
1
1
2π f j
1
+
+
C
C
C
+
⋅ ⋅
C
2
2
2
G
s
2
2
FB
f ( ) L C
(EQ. 10)
FB
(EQ. 9)
(in
ISL8105B
frequency. When designing compensation networks, select
target crossover frequencies in the range of 10% to 30% of
the switching frequency, f
Component Selection Guidelines
Output Capacitor Selection
An output capacitor is required to filter the output and supply
the load transient current. The filtering requirements are a
function of the switching frequency and the ripple current.
The load transient requirements are a function of the slew
rate (di/dt) and the magnitude of the transient load current.
These requirements are generally met with a mix of
capacitors and careful layout.
For applications that have transient load rates above 1A/ns.
High frequency capacitors initially supply the transient and
slow the current load rate seen by the bulk capacitors. The
bulk filter capacitor values are generally determined by the
ESR (effective series resistance) and voltage rating
requirements rather than actual capacitance requirements.
High frequency decoupling capacitors should be placed as
close to the power pins of the load as physically possible. Be
careful not to add inductance in the circuit board wiring that
could cancel the usefulness of these low inductance
components. Consult with the manufacturer of the load on
specific decoupling requirements.
Use only specialized low-ESR capacitors intended for
switching-regulator applications for the bulk capacitors. The
bulk capacitor’s ESR will determine the output ripple voltage
and the initial voltage drop after a high slew-rate transient. An
aluminum electrolytic capacitor's ESR value is related to the
case size with lower ESR available in larger case sizes.
However, the equivalent series inductance (ESL) of these
capacitors increases with case size and can reduce the
usefulness of the capacitor to high slew-rate transient loading.
Unfortunately, ESL is not a specified parameter. Work with
your capacitor supplier and measure the capacitor’s
impedance with frequency to select a suitable component. In
most cases, multiple electrolytic capacitors of small case size
perform better than a single large case capacitor.
Output Inductor Selection
The output inductor is selected to meet the output voltage
ripple requirements and minimize the converter’s response
time to the load transient. The inductor value determines the
converter’s ripple current and the ripple voltage is a function
of the ripple current. The ripple voltage and current are
approximated by Equation 11:
Increasing the value of inductance reduces the ripple current
and voltage. However, the large inductance values reduce
the converter’s response time to a load transient.
ΔI =
V
------------------------------- -
IN
F
S
- V
x L
OUT
V
--------------- -
V
OUT
IN
SW
.
ΔV
OUT
= ΔI x ESR
April 15, 2010
(EQ. 11)
FN6447.2

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