LM3423MHBKBSTEV/NOPB National Semiconductor, LM3423MHBKBSTEV/NOPB Datasheet - Page 18

• Manufacturer Part Number: LM3423MHBKBSTEV/NOPB
• Description: BOARD EVAL BUCK BOOST LM3423
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LM3423MHBKBSTEV/NOPB

• Current - Output / Channel: 1A
• Outputs And Type: 1, Non-Isolated
• Voltage - Output: 35V
• Features: Dimmable
• Voltage - Input: 4.5 ~ 35V
• Utilized Ic / Part: LM3423
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM3423MHBKBSTEV

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LM3423 ONLY: DPOL, FLT, TIMR, and LRDY
The LM3423 has four additional pins: DPOL, FLT, TIMR, and
LRDY. The DPOL pin is simply used to invert the DDRV po-
larity . If DPOL is left open, then it is internally pulled high and
the polarity is correct for driving a series N-channel dimFET.
If DPOL is pulled low then the polarity is correct for using a
series P-channel dimFET in high-side dimming applications.
For a parallel P-channel dimFET, as used in the buck topol-
ogy, leave DPOL open for proper polarity.
Among the LM3423's other additional pins are TIMR and FLT
which can be used in conjunction with an input disconnect
MosFET switch as shown in
from various fault conditions.
A fault is detected and an 11.5 µA (typical) current is sourced
from the TIMR pin whenever any of the following conditions
exist:
1.
2.
3.
An external capacitor (C
the fault filter time as follows:
LED current is above regulation by more than 30%.
OVLO has engaged.
Thermal shutdown has engaged.
FIGURE 18. Boost Level-Shifted PWM Circuit
TMR
) from TIMR to AGND programs
Figure 19
to protect the module
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18
When the voltage on the TIMR pin reaches 1.24V, the device
is latched off and the N-channel MosFET open drain FLT pin
transitions to a high impedance state. The TIMR pin will be
immediately pulled to ground (reset) if the fault condition is
removed at any point during the filter period. Otherwise, if the
timer expires, the fault will remain latched until one of three
things occurs:
1.
2.
3.
When using the EN and OVP pins in conjunction with the RPD
pull-down pin, a race condition exists when exiting the dis-
abled (EN low) state. When disabled, the OVP pin is pulled
up to the output voltage because the RPD pull-down is dis-
abled, and this will appear to be a real OVLO condition. The
timer pin will immediately rise and latch the controller to the
fault state. To protect against this behavior, a minimum timer
capacitor (C
not required, short the TMR pin to AGND which will disable
the FLT flag function.
The LM3423 also includes an LED Ready (LRDY) flag to no-
tify the system that the LEDs are in proper regulation. The N-
channel MosFET open drain LRDY pin is pulled low whenever
any of the following conditions are met:
1.
2.
3.
4.
5.
6.
Note that the LRDY pin is pulled low during startup of the de-
vice and remains low until the LED current is in regulation.
FIGURE 19. Fault Detection and LED Status Circuit
The EN pin is pulled low long enough for the V
drop below 4.1V (approximately 200 ms).
The TIMR pin is pulled to ground.
A complete power cycle occurs.
V
LED current is below regulation by more than 20%.
LED current is above regulation by more than 30%.
Over-voltage protection has engaged
Thermal shutdown has engaged.
A fault has latched the device off.
CC
UVLO has engaged.
TMR
= 220pF) should be used. If fault latching is
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CC
pin to