CY3218-CAPEXP3 Cypress Semiconductor Corp, CY3218-CAPEXP3 Datasheet

KIT CAPSENSE EXPRESS CY8C20142

CY3218-CAPEXP3

Manufacturer Part Number
CY3218-CAPEXP3
Description
KIT CAPSENSE EXPRESS CY8C20142
Manufacturer
Cypress Semiconductor Corp
Series
CapSense Express™r

Specifications of CY3218-CAPEXP3

Sensor Type
Touch, Capacitive
Interface
I²C, USB
Voltage - Supply
0.9 V ~ 1.5 V
Embedded
Yes, Other
Utilized Ic / Part
CY8C20142
Processor To Be Evaluated
CY8C20142-SX2I
Interface Type
USB, I2C
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Silicon Manufacturer
Cypress
Silicon Core Number
CY8C20142-SX2I
Kit Application Type
Sensing - Touch / Proximity
Application Sub Type
Capacitive Touch
Kit Contents
Board Docs
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Sensitivity
-
Sensing Range
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-2045
Features
Cypress Semiconductor Corporation
Document Number: 001-32159 Rev. *B
Four configurable IOs supporting
2.4V to 5.25V operating voltage
Industrial temperature range: –40°C to +85°C
I
Reduce BOM cost
Low Operating Current
Available in 8-pin SOIC package
2
C slave interface for configuration
CapSense buttons
LED drive
Interrupt outputs
WAKE on interrupt input
User defined Input/output
Internal oscillator - no external oscillators or crystal
Free development tool - no external tuning components
Active current: continuous sensor scan - 1.5 mA
Sleep current: no scan, continuous sleep - 2.6 uA
CapSense Express™ - 4 Configurable IOs
198 Champion Court
Overview
The CapSense Express™ controller allows the control of four
IOs configurable as capacitive sensing buttons or as GPIOs for
driving LEDs or interrupt signals based on various button
conditions. The GPIOs are also configurable for waking up the
device from sleep based on an interrupt input.
The user has the ability to configure buttons, outputs, and
parameters through specific commands sent to the I
IOs have the flexibility in mapping to capacitive buttons and as
standard GPIO functions such as interrupt output or input, LED
drive and digital mapping of input to output using simple logical
operations. This enables easy PCB trace routing and reduces
the PCB size and stack up. CapSense Express products are
designed for easy integration into complex products.
Architecture
The logic block diagram shows the internal architecture of
CY8C20142.
The user is able to configure registers with parameters needed
to adjust the operation and sensitivity of the CapSense system.
CY8C20142 supports a standard I²C serial communication
interface that allows the host to configure the device and to read
sensor information in real time through easy register access.
The CapSense Express Core
The CapSense Express Core has a powerful configuration and
control block. It encompasses SRAM for data storage, an
interrupt controller, sleep and watchdog timers. System
resources provide additional capability such as a configurable
I
The Analog System is composed of the CapSense PSoC block
and an internal 1.8V analog reference, which together support
capacitive sensing of up to four inputs.
2
C slave communication interface and various system resets.
San Jose
,
CA 95134-1709
Revised February 11, 2008
CY8C20142
408-943-2600
2
C port. The
[+] Feedback

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CY3218-CAPEXP3 Summary of contents

Page 1

... Active current: continuous sensor scan - 1.5 mA ❐ Sleep current: no scan, continuous sleep - 2.6 uA ■ Available in 8-pin SOIC package Cypress Semiconductor Corporation Document Number: 001-32159 Rev. *B CapSense Express™ Configurable IOs Overview The CapSense Express™ controller allows the control of four IOs configurable as capacitive sensing buttons or as GPIOs for driving LEDs or interrupt signals based on various button conditions ...

Page 2

Logic Block Diagram CapSense Express Core 512B SRAM Document Number: 001-32159 Rev. *B External Vcc 4 Configurable IOs 2.4 - 5.25V TM 2KB Flash CY8C20142 Page [+] Feedback ...

Page 3

Pinouts Table 1. Pin Definitions - 8 SOIC Pin No Name 1 VSS SCL SDA 4 GP1[0] 5 GP1[1] 6 GP0[0] 7 GP0[ Document Number: 001-32159 Rev. *B Figure 1. ...

Page 4

The CapSense Analog System The CapSense analog system contains the capacitive sensing hardware.The CapSense Successive Approximation (CSA) algorithm is supported.This hardware performs capacitive sensing and scanning without requiring external components. Capacitive sensing is configurable on each GPIO pin. Additional System ...

Page 5

DC Electrical Characteristics DC Chip Level Specifications Parameter Description V Supply voltage DD I Supply current DD I Sleep mode current with POR and SB LVD active. Mid temperature range I Sleep mode current with POR and SB LVD active. ...

Page 6

DC General Purpose IO Specifications Parameter Description C Capacitive load on pins as output OUT 2.7 DC General Purpose IO Specifications This tables lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 2.4V to ...

Page 7

AC Electrical Characteristics 5.0V and 3.3V AC General Purpose IO Specifications Parameter Description TRise0 Rise time, strong mode, Cload = 50pF, Port 0 TRise1 Rise time, strong mode, Cload = 50pF, Port 1 TFall Fall time, strong mode, Cload = ...

Page 8

Figure 2. Definition for Timing for Fast/Standard Mode on the I Document Number: 001-32159 Rev. *B CY8C20142 2 C Bus Page [+] Feedback ...

Page 9

Ordering Information Ordering Code CY8C20142-SX1I 51-85066 Thermal Impedances by Package Package 8 SOIC Note + Power x θ Solder Reflow Peak Temperature Package 8 SOIC Note 2. Higher temperatures may be required based ...

Page 10

... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...

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