AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 16

• Manufacturer Part Number: AT91SAM9G10-EK
• Description: KIT DEV FOR SAM9G10 ARM
• Manufacturer: Atmel
• Type: MCUr

Specifications of AT91SAM9G10-EK

• Contents: Board, Cables, Power Supply
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Kit Contents: Board
• Svhc: No SVHC (15-Dec-2010)
• Mcu Supported Families: AT91SAM9G10, ARM926EJ-S
• Tool / Board Applications: Microcontroller
• Rohs Compliant: Yes
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

6479A–ATARM–26-May-09
3.2
3-4
MCDA0-MCDA3
SPI1_NPCS10
SPI1_NPCS12
PCK0-PCK3
SPI0_NPCS0
SPI0_NPCS1
SPI0_NPCS2
SPI0_NPCS3
SPI1_NPCS1
SPI1_NPCS3
VDDCORE
SPI0_SPCK
SPI1_SPCK
SPI0_MISO
SPI0_MOSI
SPI1_MISO
SPI1_MOSI
IRQ0-IRQ2
JTAGSEL
GNDBU
PLLRCA
PLLRCB
XOUT32
VDDBU
MCCDA
NTRST
WKUP
XOUT
SHDN
AT91SAM9G10 Block Diagram
NRST
MCCK
DRXD
XIN32
RTCK
DTXD
RXD0
RXD1
RXD2
TXD0
SCK0
CTS0
TXD1
SCK1
CTS1
TXD2
SCK2
CTS2
RTS0
RTS1
RTS2
TDO
TMS
TCK
TST
XIN
FIQ
TDI
Figure 3-1.
OSC
PIOA
PLLA
PLLB
POR
POR
OSC
Boundary Scan
WDT
System Controller
GPBREG
JTAG
PIOB
SHDWC
DBGU
RSTC
PMC
RTT
AIC
PDC
PIT
PIOC
Block Diagram
USART0
USART1
USART2
SPI0
SPI1
MCI
ICE
PDC
PDC
PDC
PDC
PDC
PDC
ITCM
Fast SRAM
160K bytes
Fast ROM
32K bytes
I
Instruction Cache
Peripheral
Peripheral
Controller
Bridge
DMA
APB
16K bytes
DTCM
Interface
D
TCM
ARM926EJ-S Core
5-layer
MMU
Matrix
I
D
BIU
Data Cache
PDC
PDC
PDC
16K bytes
AT91SAM9G10-EK Evaluation Board User Guide
DMA
FIFO
DMA
LUT
FIFO
LCD Controller
Timer Counter
USB Device
USB Host
CompactFlash
SSC0
SSC1
SSC2
NAND Flash
TC0
TC1
TC2
TWI
Controller
Controller
SDRAM
Memory
Static
EBI
ETM
FIFO
HDMA
HDPA
HDMB
HDPB
DDM
DDP
TSYNC
TCLK
TPS0-TPS2
TPK0-TPK15
BMS
D0-D15
A0/NBS0
A1/NBS2/NWR2
A2-A15/A18-A21
A22/REG
A16/BA0
A17/BA1
NCS0
NCS1/SDCS
NCS2
NCS3/NANDCS
NRD/CFOE
NWR0/NWE/CFWE
NWR1/NBS1/CFIOR
NWR3/NBS3/CFIOW
SDCK
SDCKE
RAS-CAS
SDWE
SDA10
NWAIT
A23-A24
A25/CFRNW
NCS4/CFCS0
NCS5/CFCS1
CFCE1
CFCE2
NCS6/NANDOE
NCS7/NANDWE
D16-D31
LCDD0-LCDD23
LCDVSYNC
LCDHSYNC
LCDDOTCK
LCDDEN
LCDCC
TF0
TK0
TD0
RD0
RK0
RF0
TF1
TK1
TD1
RD1
RK1
RF1
TF2
TK2
TD2
RD2
RK2
RF2
TCLK0
TCLK1
TCLK2
TIOA0
TIOB0
TIOA1
TIOB1
TIOA2
TIOB2
TWD
TWCK