EVAL-ADUC841QSZ Analog Devices Inc, EVAL-ADUC841QSZ Datasheet - Page 82

• Manufacturer Part Number: EVAL-ADUC841QSZ
• Description: KIT DEV FOR ADUC841 QUICK START
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC841QSZ

• Contents: Evaluation Board, Power Supply, Cable, Software and Documentation
• Silicon Manufacturer: Analog Devices
• Core Architecture: 8052
• Silicon Core Number: ADUC841
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: ADUC8xx
• Development Tool Type: Hardware - Eval/Demo Board
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC841
• Lead Free Status / Rohs Status: Compliant
• Other names: EVAL-ADUC841QS; EVAL-ADUC841QS

ADuC841/ADuC842/ADuC843
Parameter
SPI MASTER MODE TIMING (CPHA = 1)
t
t
t
t
t
t
t
t
t
1
SL
SH
DAV
DSU
DHD
DF
DR
SR
SF
Characterized under the following conditions:
a. Core clock divider bits CD2, CD1, and CD0 bits in PLLCON SFR set to 0, 1, and 1, respectively, i.e., core clock frequency = 2.09 MHz.
b. SPI bit-rate selection bits SPR1 and SPR0 in SPICON SFR set to 0 and 0, respectively.
SCLOCK Low Pulse Width
SCLOCK High Pulse Width
Data Output Valid after SCLOCK Edge
Data Input Setup Time before SCLOCK Edge
Data Input Hold Time after SCLOCK Edge
Data Output Fall Time
Data Output Rise Time
SCLOCK Rise Time
SCLOCK Fall Time
(CPOL = 0)
(CPOL = 1)
SCLOCK
SCLOCK
MOSI
MISO
1
1
t
DAV
t
SH
t
DSU
Figure 91. SPI Master Mode Timing (CPHA = 1)
MSB IN
t
MSB
DHD
t
SL
Rev. 0 | Page 82 of 88
t
DF
t
DR
BITS 6–1
BITS 6–1
t
SR
Min
100
100
t
LSB IN
SF
LSB
Typ
476
476
10
10
10
10
Max
50
25
25
25
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns