ADZS-BF527-EZLITE Analog Devices Inc, ADZS-BF527-EZLITE Datasheet - Page 68
![BOARD EVAL ADSP-BF527](/photos/9/22/92228/analog_devices_adzs-bf527-ezlite_sml.jpg)
ADZS-BF527-EZLITE
Manufacturer Part Number
ADZS-BF527-EZLITE
Description
BOARD EVAL ADSP-BF527
Manufacturer
Analog Devices Inc
Series
Blackfin®r
Type
DSPr
Datasheet
1.ADZS-BF527-EZLITE.pdf
(80 pages)
Specifications of ADZS-BF527-EZLITE
Featured Product
Blackfin® BF50x Series Processors
Contents
Evaluation Board
Silicon Manufacturer
Analog Devices
Core Architecture
Blackfin
Features
USB-based, PC-hosted Tool Set
Silicon Core Number
ADSP-BF527
Silicon Family Name
Blackfin
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
ADSP-BF527
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
ADSP-BF522/523/524/525/526/527
Capacitive Loading
Output delays and holds are based on standard capacitive loads
of an average of 6 pF on all balls (see
to (V
Figure 71
The delay and hold specifications given should be derated by a
factor derived from these figures. The graphs in these figures
may not be linear outside the ranges shown.
V
LOAD
NOTES:
THE WORST CASE TRANSMISSION LINE DELAY IS SHOWN AND CAN BE USED
FOR THE OUTPUT TIMING ANALYSIS TO REFELECT THE TRANSMISSION LINE
EFFECT AND MUST BE CONSIDERED. THE TRANSMISSION LINE (TD), IS FOR
LOAD ONLY AND DOES NOT AFFECT THE DATA SHEET TIMING SPECIFICATIONS.
ANALOG DEVICES RECOMMENDS USING THE IBIS MODEL TIMING FOR A GIVEN
SYSTEM REQUIREMENT. IF NECESSARY, A SYSTEM MAY INCORPORATE
EXTERNAL DRIVERS TO COMPENSATE FOR ANY TIMING DIFFERENCES.
4pF
DDEXT
Figure 59. Equivalent Device Loading for AC Measurements
50
show how output rise time varies with capacitance.
/V
DDMEM
70
50
400
2pF
) /2. The graphs of
(Includes All Fixtures)
45
0.5pF
TESTER PIN ELECTRONICS
ZO = 50 (impedance)
TD = 4.04
Figure
Figure 60
T1
59). V
1.18 ns
through
Rev. PrG | Page 68 of 80 | February 2009
LOAD
OUTPUT
is equal
DUT
Preliminary Technical Data