DK-DEV-3CLS200N Altera, DK-DEV-3CLS200N Datasheet - Page 56
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DK-DEV-3CLS200N
Manufacturer Part Number
DK-DEV-3CLS200N
Description
KIT DEV CYCLONE III LS EP3CLS200
Manufacturer
Altera
Series
Cyclone® IIIr
Type
FPGAr
Datasheets
1.EP3C5F256C8N.pdf
(34 pages)
2.EP3C5F256C8N.pdf
(14 pages)
3.DK-START-3C25N.pdf
(74 pages)
4.DK-DEV-3CLS200N.pdf
(42 pages)
Specifications of DK-DEV-3CLS200N
Contents
Board
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Cyclone
Silicon Core Number
EP3C
Silicon Family Name
Cyclone III LS
Rohs Compliant
Yes
For Use With/related Products
EP3CLS200
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2601
Development Kits
Altera and Partner Development Kits
54
Product and Vendor Name
QuickUSB Starter Kit
Bitwise Systems
C3 Digital Radio Kit
CEPD
Cyclone III FPGA/
PCI Development Board
CEPD
XpressGXII Kit
System Level Solutions
SuperUSBC3-55
PLDA
A01 LVDSS FPGA AMC
Dallas Logic
Stratix IV GX/GT 40G/
100G Interlaken
HiTech Global
Altera Product Catalog
•
2011
•
www.altera.com
EP2SGX130FF1508C3
Arria GX EP1AGX60
Cyclone III EP3C16
EP3C55U484C6N
EP3C16F484C8N
EP2C20F256C7
Stratix II GX
EP4SGX530
EP4S100G5
Cyclone III
Cyclone III
Cyclone II
Stratix IV
Device
Description
This kit includes one QuickUSB module and one QuickUSB Cyclone II
Evaluation Board. The evaluation board has a QuickUSB module site on
headers that provide access to the signals. The EP2C20F256C7 FPGA
connects to nearly every pin of the QuickUSB module, and extra I/O pins
go to the headers so you can wire in your circuitry. The kit gets its power
from the USB bus, but if you need more power, there is a power connector
and a 5V/2A power supply included in the kit.
This kit aids in the development and testing of algorithms and signal
processing applications including digital radio, modulator/demodulator
development, SDR, high-speed data acquisition and signal processing,
and audio data acquisition and signal processing. The acquired signals
are sampled and then digitally processed by a Cyclone III FPGA. The FPGA
card comes with a JTAG programming connector and a configuration
PROM to retain the FPGA settings. The PCI card provides interfaces for
the FPGA card to a computer PCI bus, RS232 interface, and user push
buttons and includes a digital radio reference design example and
full documentation.
This board provides a platform for fast and easy prototyping and design
verification with the Cyclone III EP3C16F484C8N FPGA. It can be
accessed either through the PCI bus or powered standalone and accessed
through an RS232 port. It comes with an onboard configuration PROM to
retain the FPGA settings, an RS232 level shifter, voltage monitor,
oscillator, buttons, and LEDs. There is a prototyping area on the board
for user circuits and all FPGA pins are accessible through connectors and
clearly labeled test points. The connectors are designed to mate with
other CEPD daughterboards.
This kit provides a complete hardware and software environment for
Altera Stratix II GX FPGAs. It is built around a PCI form factor card
compliant with PCI-SIG and targets the development of designs using
PCIe Gen1.
This kit provides a low-cost hardware and software environment for
prototyping and deploying SuperSpeed USB applications. It targets the
Altera Cyclone III FPGA (EP3C55F484C6N) and includes everything you
need to implement a complete USB 3.0 subsystem.
This LVDS transceiver card features the Arria GX FPGA in the F780 BGA
package. The backplane interface is user configurable to support several
interface standards including PCIe, Serial RapidIO, and GbE. The front
panel VHDCI connector supports 28 transmit and 28 receive LVDS links
sourced from the FPGA (and 2 clock signals for each transmit and receive
connector). Additional features include two 512 Kb x36 synchronous
SRAMs, an IPMI 1.5-compliant Module Management Controller (MMC),
a 32-Mb serial flash memory, two onboard temperature sensors, USB
communication and debug interface, and a 32-bit Mictor
debug connector.
This board integrates the most fundamental electrical and optical
interfaces for building 200G subsystems. It implements CAUI and
Interlaken high-speed serial interfaces, industry-leading, high-speed DDR3
and QDR II+ interfaces, and high-speed parallel interconnect for NetLogic
knowledge-based processors (KBPs). The modular design enables
expansion to support legacy and emerging optical modules.