Z8F083A0128ZCOG Zilog, Z8F083A0128ZCOG Datasheet - Page 23

• Manufacturer Part Number: Z8F083A0128ZCOG
• Description: KIT DEVELOPMENT F083A
• Manufacturer: Zilog
• Series: Z8 Encore! XP®r
• Type: MCUr

Specifications of Z8F083A0128ZCOG

• Contents: Hardware, Software and Documentation
• For Use With/related Products: Z8F083A
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4672

Table 8. Mass Erase Operation Parameters
PRS001003-1207
Parameter
Read cycle time
Mass erase setup time
NVSTR setup time
Mass Erase hold time
Mass Erase recovery time
AE hold time
IFREN setup time in ME
IFREN hold time in ME
Address setup time at read
Address hold time at read
AE pulse high hold time at Tcyc
AE pulse low hold time at Tcyc
AE access time
AE to output high Z
AE disable hold time in ME and read
AE disable hold time in read and ME
CE pulse low hold time at MASE
Notes:
1. During Mass Erase operation, MASE is high, and OE, PROG, SERA are always
2. IFREN pin determines whether, both the main memory block and information block,
3. All memory cell will be erased to “1”. During this mode, information block will be
4. All addresses and data inputs are don’t care for Mass Erase operation.
5. If you do not follow the timing specification such as Tnvs and Tmrec it may cause fatal
6. All input waveforms are with rising time (tr) and falling time (tf) of 1 ns. The capacitor
logic “L”.
or only the main memory block will be erased.
erased when IFREN is high.
damage.
loading for all the eFlash macro input pin is 0.5 pF.
Tcyc
Tmrec
Tis
Tih
Tasr
Taefh
Tdf
Tmr
Trm
Tceplr
Symbol
Tmes
Tnvs
Tmeh
Taeh
Tahr
Taerh
Tae
Min.
50
20
120
50
100
0
0
20
0
Tcyc
28
Tcyc-Taerh
-
1
10
10
10
Z8 Encore!
Max.
-
-
-
80
-
-
-
-
-
Tcyc-10
Tcyc-Taerh ns
45 ns
-
-
-
-
®
F083x Series
Unit
ns
ns
ns
ms
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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