C8051F411EK Silicon Laboratories Inc, C8051F411EK Datasheet - Page 183

• Manufacturer Part Number: C8051F411EK
• Description: KIT EVAL FOR C8051F411
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F411EK

• Contents: Evaluation Board, CD-ROM, USB Cable, Batteries and User Guide
• Processor To Be Evaluated: C8051F41x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F411
• Silicon Family Name: C8051F41x
• Kit Contents: LCD Based Evaluation Board, USB Cable, Software CD And Quick-Start Guide
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F41x
• For Use With: 336-1315 - KIT REF DESIGN VOICE RECORD F41X
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1317

20.2.3. Automatic Gain Control (Crystal Mode Only)
Automatic Gain Control is enabled by setting AGCEN (RTC0XCN.7) to a logic 1. When enabled, the
smaRTClock oscillator trims the oscillation amplitude to save power. This mode is useful for preserving
battery life in systems where oscillator performance is not critical and external conditions are stable.
Note: Setting the AGCEN to a logic 1 in self-oscillator mode can lead to drastic changes in the smaRT-
Clock oscillator frequency.
20.2.4. smaRTClock Bias Doubling
The smaRTClock Bias Doubling is enabled by setting BIASX2 (RTC0XCN.5) to 1b. When enabled, the
bias current to smaRTClock is doubled allowing for more robust oscillator performance. When the smaRT-
Clock oscillator is in Self-Oscillate mode, the oscillation frequency is increased from 20 to 40 kHz. When
operating in Crystal Mode, the oscillator is less likely to be affected by external conditions when
BIASX2 = ‘1’. Enabling Bias Doubling increases the power consumption of smaRTClock; therefore, it is not
recommended for use in power-critical systems.
20.2.5. smaRTClock Missing Clock Detector
The smaRTClock Missing Clock Detector is a one-shot circuit enabled by setting MCLKEN (RTC0CN.6) to
a logic 1. When the smaRTClock Missing Clock Detector is enabled, OSCFAIL (RTC0CN.5) is set by hard-
ware if RTCCLK remains high or low for more than 50 µs. A smaRTClock Missing Clock detector timeout
triggers three events:
Note: The smaRTClock Missing Clock Detector should be disabled when making changes to the oscillator
settings in RTC0XCN.
1. Awakening the internal oscillator from Suspend Mode.
2. smaRTClock Interrupt (If the smaRTClock Interrupt is enabled).
3. MCU reset (If smaRTClock is enabled as a reset source).
Rev. 1.1
C8051F410/1/2/3
183