HS7144KCI02H Renesas Electronics America, HS7144KCI02H Datasheet - Page 186
HS7144KCI02H
Manufacturer Part Number
HS7144KCI02H
Description
ON CHIP DEBUG EMULATOR W/TRACE
Manufacturer
Renesas Electronics America
Type
In Circuit Debuggerr
Specifications of HS7144KCI02H
Contents
E10A-LITE, Cable and CD-ROM
For Use With/related Products
SH7144
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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6.5.3
1. When an odd address is set, the address is rounded down to an even address.
2. A software break is accomplished by replacing instructions. Accordingly, it can be set only to
3. During step execution, software breakpoints are disabled.
4. A condition set at Break Condition 3 is disabled when an instruction at a software breakpoint
5. When execution resumes from the breakpoint address after the program execution stops at a
6. When a software breakpoint is set to the slot instruction of a delayed branch instruction, the PC
6.5.4
When the JTAG clock (TCK) is used, set the frequency to lower than that of the system clock.
164
the RAM area. However, a software break cannot be set to the following addresses:
is executed. Do not set a software breakpoint to an instruction in which Break Condition 3 is
satisfied.
software breakpoint, single-step execution is performed at the address before execution
resumes. Therefore, realtime operation cannot be performed.
value becomes an illegal value. Accordingly, do not set a software breakpoint to the slot
instruction of a delayed branch instruction.
An area other than the CS0 areas and the internal RAM area
An instruction in which Break Condition 3 is satisfied
A slot instruction of a delayed branch instruction
Notes on Using the JTAG Clock (TCK)
Notes on Setting the [Breakpoint] Dialog Box
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