ATF15XX-SAQ100 Atmel, ATF15XX-SAQ100 Datasheet - Page 17

• Manufacturer Part Number: ATF15XX-SAQ100
• Description: ADAPTER FOR ATF15XX-DK2 100PQFP
• Manufacturer: Atmel

Specifications of ATF15XX-SAQ100

• Accessory Type: ATF15xxDK2 Adapter
• For Use With/related Products: 160-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 2-9. Pin Numbers of GCLR, OE1, GCLK1 and GCLK2
2.1.4
2.1.5
Table 2-10. Pin Numbers of JTAG Port Signals
CPLD Development/Programmer Kit User Guide
Signal
GCLR
OE1
GCLK1
GCLK2
Signal
TDI
TDO
TMS
TCK
V
JTAG Port Header
CC
44-lead
44-lead
TQFP
TQFP
Select Jumper
39
38
37
40
32
26
1
7
44-lead
44-lead
PLCC
PLCC
44
43
38
13
32
1
2
7
The V
Board is a two-position jumper that allows the users to select the V
(either 3.3V or 5.0V) used by various components on the CPLD Development/Program-
mer Board. This voltage generated by the on-board voltage regulation circuitry is
applied to the V
anode lines of the eight 8-segment LEDs, the V
the two push-button switches, and the V
labeled JTAG.
Therefore, when a 3.3V device (ATF15xxASV/ASVL/AE/AEL) is used on this board, the
V
(ATF15xxAS/ASL/SE/SEL) is used on this board, the V
5.0V position. This is also true when the ATF15xx is being programmed through ISP on
this board.
The JTAG Port Header, labeled JTAG, on the CPLD Development/Programmer Board
is used to connect the ATF15xx's JTAG port pins (TCK, TDI, TMS and TDO) through the
ISP download cable to the parallel printer (LPT) port of a PC for ISP programming of the
ATF15xx. Table 2-10 shows the pin numbers for the four JTAG port pins of the ATF15xx
in all the available package types.
The ISP algorithm is controlled by the ATMISP software, which runs on the PC. The
four JTAG signals are generated by the LPT port and they are buffered by the ISP
download cable before going into the ATF15xx on the CPLD Development/Programmer
Board. The pinout for the 10-pin JTAG Port Header on the CPLD Development/Pro-
grammer Board is shown in Figure 2-3 and the dimensions of this 10-pin male JTAG
header are shown in Figure 2-4.
CC
Select Jumper must be in the 3.3V position. On the other hand, when a 5V device
CC
68-lead
68-lead
PLCC
PLCC
68
67
Select Jumper, labeled VCC Select, on the CPLD Development/Programmer
12
57
19
50
1
2
CC
input pins (both VccINT and VccIO) of the ATF15xx, the common
84-lead
84-lead
PLCC
PLCC
84
83
14
71
23
62
1
2
100-lead
100-lead
PQFP
PQFP
91
90
89
92
75
17
64
6
CC
pin (Pin 4) of the 10-pin JTAG port header
CC
100-lead
100-lead
TQFP
TQFP
89
88
87
90
input of the 2 MHz crystal oscillator,
73
15
62
4
CC
Select Jumper must be in the
144-lead
144-lead
TQFP
TQFP
127
126
125
128
104
20
89
4
Hardware Description
CC
voltage level
3300A–PLD–08/02
160-lead
160-lead
PQFP
PQFP
141
140
139
142
112
22
99
9
2-7