89C5121-SK1 Atmel, 89C5121-SK1 Datasheet - Page 66

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89C5121-SK1

Manufacturer Part Number
89C5121-SK1
Description
KIT SMART CARD FOR AT89C5121
Manufacturer
Atmel
Type
Smart Cardr
Datasheet

Specifications of 89C5121-SK1

Contents
Board
For Use With/related Products
AT89C5121
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
T89C5121-SK1
T89C5121-SK1
In-System Programming
Timings
Protection Mechanisms
Transfer Checks
66
A/T8xC5121
The download from the internal EEPROM to CRAM is executed after 4 seconds when
operating at 12 MHz frequency.
In order to verify that the transfers are free of errors, a CRC check is implemented dur-
ing the download of the program in CRAM.
This test is done at the end of the 16K space programming.
As detailed in the next algorithms:
For this purpose, the user program must include in the two last upper bytes (address
3FFEh and 3FFFh) the CRC of the previous bytes (calculated from the address 0000h
to 3FFFDh).
The following frames are examples including the CRC in the two last upper bytes:
The CRC algorithm is the following :
***************************************************************************************************
U i n t 1 6 c o m p u t e _ c r c ( U i n t 1 6 W )
{
U c h a r C ;
W & = ( U i n t 1 6 ) 0 x 0 0 F F ;
f o r ( C = ( U c h a r ) 8 ; C ; C - - )
r e t u r n W ;
{
in ISP mode, if CRC test pass, a character Y is returned before the CRLF
characters else a character Z is retuned.
in download mode, a serial data AA is sent on P3.7 port and CRAM is not executed.
FF 03 C0 21 04 00 00 08 07 02 08 02 2D DB
FF 03 80 21 02 04 00 0A 03 06 C0 A8 70 01 E3 3D (CRC = E33Dh)
FF 03 C0 21 02 01 00 10 02 06 00 00 00 00 05 06 00 00 76 55 49 AC (CRC =
49ACh)
i f ( ( U c h a r ) W & ( U c h a r ) 1 )
e l s e
{
W ^ = ( U i n t 1 6 ) 0 x 8 4 0 8 ;
}
W > > = 1 ;
W > > = 1 ;
Data Bytes
Address: 3FFE,3FFF
(CRC = 2DDBh)
HSB
2 Bytes CRC
LSB
4164G–SCR–07/06

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