AD8362-EVAL Analog Devices Inc, AD8362-EVAL Datasheet - Page 21
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AD8362-EVAL
Manufacturer Part Number
AD8362-EVAL
Description
BOARD EVAL FOR AD8362
Manufacturer
Analog Devices Inc
Datasheet
1.AD8362-EVAL.pdf
(32 pages)
Specifications of AD8362-EVAL
Rohs Status
RoHS non-compliant
CHOOSING A VALUE FOR CHPF
The 3.5 GHz VGA of the AD8362 includes an offset cancel-
lation loop, which introduces a high-pass filter effect in its
transfer function. To properly measure the amplitude of the
input signal, the corner frequency (f
well below that of the lowest input signal in the desired
measurement bandwidth frequency. The required value
of the external capacitor is given by
For operation at frequencies as low as 100 kHz, set f
approximately 25 kHz (CHPF = 8 nF). For frequencies above
approximately 2 MHz, no external capacitance is required
because there is adequate internal capacitance on this node.
CHOOSING A VALUE FOR CLPF
In the standard connections for the measurement mode, the
VSET pin is tied to VOUT. For small changes in input ampli-
tude such as a few decibels, the time-domain response of this
loop is essentially linear with a 3 dB low-pass corner frequency
of nominally f
around this local loop set the minimum recommended value
of this capacitor to about 300 pF, making f
For operation at lower signal frequencies, or whenever the
averaging time needs to be longer, use
When the input signal exhibits large crest factors, such as a
CDMA or W-CDMA signal, CLPF must be much larger than
might seem necessary. This is due to the presence of significant
low frequency components in the complex, pseudorandom
Table 4. Recommended CLPF Values for Various Modulation Schemes
Modulation Scheme/Standard
W-CDMA , Single-Carrier, Test Model 1-64
W-CDMA 4-Carrier, Test Model 1-64
CDMA2000, Single-Carrier, 9CH Test Model
CDMA2000, 3-Carrier, 9CH Test Model
WiMAX 802.16 (64QAM, 256 Subcarriers, 10 MHz Bandwidth)
CHPF = 200 μF/2(π)f
CLPF = 900 μF/2(π)f
LP
= 1/(CLPF × 1.1 kΩ). Internal time delays
LP
HP
(f
(f
LP
HP
in Hz)
in Hz)
HP
) of this filter must be
LP
= 3 MHz.
HP
to
(13)
(14)
Rev. D | Page 21 of 32
Crest Factor
12.0 dB
11.0 dB
9.1 dB
11.0 dB
14.0 dB
modulation, which generates fluctuations in the output of the
AD8362. Increasing CLPF also increases the step response of
the AD8362 to a change at its input.
Table 4 shows recommended values of CLPF for popular
modulation schemes. In each case, CLPF is increased until
residual output noise falls below 50 mV. A 10% to 90% step
response to an input step is also listed. Where the increased
response time is unacceptably high, CLPF must be reduced.
If the output of the AD8362 is sampled by an ADC, averaging
in the digital domain can further reduce the residual noise.
Figure 52 shows how residual ripple and rise/fall time vary with
filter capacitance when the AD8362 is driven by a single carrier
W-CDMA signal (Test Model 1-64) at 2140 MHz.
180
170
160
150
140
130
120
110
100
Figure 52. Residual Ripple, Rise and Fall Time vs. Filter Capacitance,
90
80
70
60
50
40
30
20
10
0
0
CLPF
0.1 μF
0.1 μF
0.1 μF
0.1 μF
0.1 μF
RESIDUAL RIPPLE (mV p-p)
Single Carrier W-CDMA Input Signal, Test Model 1-64
0.1
0.2
Residual Ripple
28 mV p-p
20 mV p-p
38 mV p-p
29 mV p-p
30 mV p-p
0.3
FILTER CAPACITANCE (µF)
0.4
0.5
RISE TIME (ms)
0.6
FALL TIME (ms)
Response Time (Rise/Fall)
10% to 90%
171 μs/1.57 ms
162 μs/1.55 ms
179 μs /1.55 ms
171 μs/1.55 ms
157 μs/1.47 ms
0.7
0.8
0.9
AD8362
1.0
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