EVAL-AD1953EB Analog Devices Inc, EVAL-AD1953EB Datasheet

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EVAL-AD1953EB

Manufacturer Part Number
EVAL-AD1953EB
Description
BOARD EVAL FOR AD1953
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-AD1953EB

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
a
SigmaDSP is a trademark of Analog Devices, Inc.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
OVERVIEW
The AD1953 evaluation board (EVAL-AD1953EB) permits
testing and demonstration of the AD1953 3-channel, 24-bit
SigmaDSP audio processor. An input signal is required in
either optical or coaxial S/PDIF format, or directly via one
of three 10-pin headers in I
DSP modes. The internal signal processing program and
parameters of the AD1953 can be controlled by a 25-lead SPI
interface to a computer’s parallel port.
Power requirements are a ± 9 V to +12 V dc source for both
the analog and digital sections. On-board regulators drive
separate “clean” 5 V dc supplies for the digital and analog
sections. Three analog RCA phone jacks provide analog
audio output. Digital output comes from optical and RCA
jacks in S/PDIF format.
AD1953 OVERVIEW
The AD1953 is a complete 26-bit, single-chip, 3-channel
digital audio playback system with built-in DSP functionality
for speaker equalization, dual-band dynamics processing
(compressor/expander/limiter/noise gate), delay compensation,
and spatial enhancement. These algorithms can be used to
compensate for real-world limitations of speakers, amplifiers,
and listening environments, resulting in a dramatic improvement
of perceived audio quality.
OUTPUT
J2
INPUT
J1
U6
TORX173
U1
TOTX173
U5
2
S, left-justified, right-justified, or
TRANSMITTER
VERF
D1
RECEIVER
74HC04
S/PDIF
S/PDIF
U3
U2
U4
EMP
D2
FUNCTIONAL BLOCK DIAGRAM
SW2 SW3
J14
EXT. INPUTS
M4A5-128/64
INTERFACE
PLD
J15
U13
INTERFACE
J16
CODEC
J17
INTERFACE
J12-SPI
RESET
The signal processing used in the AD1953 is comparable to that
found in high end studio equipment. Most of the processing is
done in full 48-bit double-precision mode, resulting in very good
low level signal performance and the absence of limit cycles or idle
tones. The compressor/limiter uses a sophisticated two-band
algorithm often found in high end broadcast compressors.
An extensive SPI port allows click-free parameter updates, along
with readback capability from any point in the algorithm flow.
The AD1953 also includes ADI’s patented multibit sigma-delta
DAC architecture that provides 112 dB SNR and dynamic range
and THD+N of –100 dB. These specifications allow the AD1953 to
be used in applications ranging from low end boom boxes to high
end professional mixing/editing systems.
The AD1953 also has a digital output that allows it to be used
purely as a DSP. This digital output can be used to drive an
external DAC to extend the number of channels beyond the
three that are provided on the chip.
The AD1953 operates from a single 5 V power supply. It is
fabricated on a single monolithic integrated circuit and is housed
in a 48-lead LQFP package for operation over the temperature
range –40°C to +105°C.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
SW1
ADM811
MCLK0
MCLK1
MCLK2
U12
74HC04
ZERO
D3
U3
J13
MUTE
SIGMADSP
AD1953
74AC244
S2
U15
U7
DATA
OUTPUT
EVAL-AD1953EB
Evaluation Board
OP275
OP275
OP275
U8A
U8B
U9A
© Analog Devices, Inc., 2002
SigmaDSP
604
604
604
www.analog.com
LEFT
J3
RIGHT
J4
SUB
J5

Related parts for EVAL-AD1953EB

EVAL-AD1953EB Summary of contents

Page 1

... OVERVIEW The AD1953 evaluation board (EVAL-AD1953EB) permits testing and demonstration of the AD1953 3-channel, 24-bit SigmaDSP audio processor. An input signal is required in either optical or coaxial S/PDIF format, or directly via one 2 of three 10-pin headers left-justified, right-justified, or DSP modes. The internal signal processing program and parameters of the AD1953 can be controlled by a 25-lead SPI interface to a computer’ ...

Page 2

... EVAL-AD1953EB PERFORMANCE SPECIFICATIONS The typical evaluation board performance is tabulated below. 112 dB ± SNR 112 dB ± DR, A-Weighted –100 dB ± THD + N ±0.2 dB kHz (0 dBFS) 4. Frequency Response 5. Noise Floor –145 dB 6. Full-Scale Audio Output 2.0 V rms FUNCTIONAL DESCRIPTION The AD1953 evaluation board presents a reference design that ...

Page 3

... U2 and U7 via switch SW3. • U3 (74HC04 quad input logic inverter that provides miscellaneous buffering and interface functions. • U4 (CS8404A-CS) is the S/PDIF transmitter that takes in the serial data SDATA, master clock MCLK, the left/right –3– EVAL-AD1953EB ...

Page 4

... Graphical Compiler, which writes to the program and parameter RAMs through the SPI port of the AD1953. More in-depth documentation is available for all software. FURTHER INFORMATION Ordering information: order number is EVAL-AD1953EB. For application questions, please contact our Central Applica- tions Department at 1-781-937-1428. –4– ...

Page 5

... REV. 0 Figure 1. Silkscreen – Top Overlay –5– EVAL-AD1953EB ...

Page 6

... EVAL-AD1953EB Figure 2. Component – Top Layer –6– REV. 0 ...

Page 7

... REV. 0 Figure 3. Internal Plane 2 – Ground Planes –7– EVAL-AD1953EB ...

Page 8

... EVAL-AD1953EB Figure 4. Internal Plane 3 – Power Planes –8– REV. 0 ...

Page 9

... REV. 0 Figure 5. Bottom Layer – Solder Side –9– EVAL-AD1953EB ...

Page 10

... EVAL-AD1953EB Qty. Used Designator Description 27 C1, C5–C11, Multilayer Ceramic 50 V X7R C13, C51–C54, C56, C58, C61, C64, C66–C71, C87–C90 4 C2, C3, C63, C91 Multilayer Ceramic 50 V X7R 1 C4 Multilayer Ceramic 50 V X7R 2 C12, C57 SMD Aluminum Electrolytic Capacitor (Case ...

Page 11

... SO28WB SO14NB SO24WB TRAFFO-SC937-02 TRAFFO-SC937-02 LQFP48 SO8NB D-PAK SO8NB SOT143 QFP100-3 SO14NB SO20WB SOT23-5 –11– EVAL-AD1953EB Value 10.0 kΩ 75 Ω 475 Ω 649 Ω 374 Ω 90.9 kΩ 8.25 kΩ 2.80 kΩ 806 Ω 3.01 kΩ 1.50 kΩ 1.00 kΩ ...

Page 12

... EVAL-AD1953EB Figure 6. Evaluation Board, S/PDIF Interfaces –12– REV. 0 ...

Page 13

... CCLK 20 CLATCH 46 COUT 40 ZEROFLAG 21 RESETB RESETB 6 MUTE 5 AUXDATA AUXDATA DGND DGND AGND AGND AGND AGND Figure 7. Evaluation Board, DUT –13– EVAL-AD1953EB C11 0 AVDD 33 VOUTL+ VOUTL+ 34 VOUTL– VOUTL– 29 VOUTR+ VOUTR+ 28 AVDD TP1 VOUTR– VOUTR– XREF 26 VOUTS+ VOUTS+ ...

Page 14

... EVAL-AD1953EB Figure 8. Evaluation Board, Analog Output Section –14– REV. 0 ...

Page 15

... IN1 OUT2 C63 7 6 ERROR IN2 10nF 5 3 C60 + C61 SD GND 0.1 F TP7 25V 4 AGND + C62 47 F –12V –15– EVAL-AD1953EB DVDD DVDD R43 C66 10.0k 0.1 F LK8 R41 2 4 RESET VCC 649 SW1 RED MR GND DVDD AVDD C64 R42 0.1 F ...

Page 16

... EVAL-AD1953EB I/O56 81 I/O57 82 I/O58 83 I/O59 84 I/O60 85 I/O61 86 I/O62 87 I/O63 88 VCC 89 GND 90 GND 91 VCC 92 I/O0 93 I/O1 94 I/O2 95 I/O3 96 I/O4 97 I/O5 98 I/O6 99 I/O7 100 SDO BCK0 LRCK0 Figure 10. Evaluation Board, CPLD Section –16– I/O39 50 I/O38 49 I/O37 48 I/O36 47 I/O35 46 I/O34 45 I/O33 44 I/O32 43 VCC ...

Page 17

... Figure 11. Evaluation Board, External Digital Interface REV. 0 –17– EVAL-AD1953EB ...

Page 18

... EVAL-AD1953EB DVDD J6-13 J6-28 J6-29 J6-1 J6-14 J6-15 J6-18 J6-6 UCSEL1 J6-7 UCSEL2 PROGRAM SELECT J6-8 UCSEL3 J6-9 UCSEL4 RESET J6-10 RESETB J6-22 COUT-UC J6-23 CLATCH-UC SPI CONTROL J6-26 CCLK-UC INTERRUPT J6-27 CDATA-UC REQUEST SW4 4 2 J6-5 C91 R84 10nF 100 ...

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