EVAL-AD7693CB Analog Devices Inc, EVAL-AD7693CB Datasheet - Page 7

• Manufacturer Part Number: EVAL-AD7693CB
• Description: BOARD EVAL FOR AD7693 ADC
• Manufacturer: Analog Devices Inc
• Series: PulSAR®r

Specifications of EVAL-AD7693CB

• Number Of Adc's: 1
• Number Of Bits: 16
• Sampling Rate (per Second): 500k
• Data Interface: Serial
• Inputs Per Adc: 1 Differential
• Input Range: ±VREF
• Power (typ) @ Conditions: 18mW @ 500kSPS
• Voltage Supply Source: Single
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD7693
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
1
AI = analog input, DI = digital input, DO = digital output, and P = power.
Mnemonic
REF
VDD
IN+
IN−
GND
CNV
SDO
SCK
SDI
VIO
Figure 5. 10-Lead MSOP Pin Configuration
GND
VDD
REF
IN+
IN–
1
2
3
4
5
(Not to Scale)
AD7693
TOP VIEW
Type
AI
P
AI
AI
P
DI
DO
DI
DI
P
1
10
9
8
7
6
VIO
SDI
SCK
SDO
CNV
Serial Data Output. The conversion result is output on this pin. It is synchronized to SCK.
Description
Reference Input Voltage. The REF range is from 0.5 V to VDD. It is referred to the GND pin. This
pin should be decoupled closely to the pin with a 10 μF capacitor.
Power Supply.
Differential Positive Analog Input.
Differential Negative Analog Input.
Power Supply Ground.
Convert Input. This input has multiple functions. On its leading edge, it initiates the conversions
and selects the interface mode of the part: chain or CS mode. In chain mode, the data should be
read when CNV is high. In CS mode, the SDO pin is enabled when CNV is low.
Serial Data Clock Input. When the part is selected, the conversion result is shifted out by this
clock.
Serial Data Input. This input provides multiple features. It selects the interface mode of the ADC
as follows:
Chain mode is selected if SDI is low during the CNV rising edge. In this mode, SDI is used as a
data input to daisy-chain the conversion results of two or more ADCs onto a single SDO line.
The digital data level on SDI is output on SDO with a delay of 16 SCK cycles.
CS mode is selected if SDI is high during the CNV rising edge. In this mode, either SDI or CNV
can enable the serial output signals when low and if SDI or CNV is low when the conversion is
complete, the busy indicator feature is enabled.
Input/Output Interface Digital Power. Nominally at the same supply as the host interface (1.8 V,
2.5 V, 3 V, or 5 V).
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Figure 6. 10-Lead QFN (LFCSP) Pin Configuration
GND
VDD
REF
IN+
IN–
1
2
3
4
5
(Not to Scale)
AD7693
TOP VIEW
10 VIO
9 SDI
8 SCK
7 SDO
6 CNV
AD7693