Z86E4000ZDV Zilog, Z86E4000ZDV Datasheet - Page 26

• Manufacturer Part Number: Z86E4000ZDV
• Description: 44 PIN PLCC ADAPTER
• Manufacturer: Zilog

Specifications of Z86E4000ZDV

• Convert From (adapter End): 40-Pin DIP ZIF Socket
• Convert To (adapter End): 44-PLCC Plug
• For Use With/related Products: Zilog Emulators/Programmers
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-2015

PIN FUNCTIONS (Continued)
Z86E30/E31/E40
Z8 4K OTP Microcontroller
Port 1 (P17–P10). Port 1 is an 8-bit, bidirectional, CMOS-
compatible port with multiplexed Address (A7–A0) and
Data (D7–D0) ports. These eight I/O lines can be pro-
grammed as inputs or outputs or can be configured under
software control as an Address/Data port for interfacing
external memory. The input buffers are Schmitt-triggered
and the output buffers can be globally programmed as ei-
ther push-pull or open-drain. Low EMI output buffers can
be globally programmed by the software. Port 1 can be
placed under handshake control. In this configuration, Port
3, lines P33 and P34 are used as the handshake controls
26
Open-Drain
OEN
Out
In
1.5
Figure 19. Port 1 Configuration (Z86E40 Only)
MCU
2.3V Hysteresis
P R E L I M I N A R Y
Port 2 (I/O)
Handshake Controls
DAV1 and RDY1
R
(P33 and P34)
RDY1 and /DAV1 (Ready and Data Available). To inter-
face external memory, Port 1 must be programmed for the
multiplexed Address/Data mode. If more than 256 external
locations are required, Port 0 outputs the additional lines
(Figure 19).
Port 1 can be placed in the high-impedance state along
with Port 0, AS, DS, and R/W, allowing the Z86E40 to
share common resources in multiprocessor and DMA ap-
plications.
500 k
Auto Latch
PAD
DS97Z8X0502
Zilog