CY3672 Cypress Semiconductor Corp, CY3672 Datasheet

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CY3672

Manufacturer Part Number
CY3672
Description
KIT DEV FTG PROGRAMMING KIT
Manufacturer
Cypress Semiconductor Corp
Series
CyClocks™r
Type
FTG (Frequency Timing Generator)r
Datasheets

Specifications of CY3672

Contents
Programmer, Power Supply, Cable(s) and Software
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
CY2077, CY22050F, CY22150F, CY2239, CY22381F, CY27EE16, CY23FP12, CY26049, CY25701, CY25100F
For Use With
CY3613 - PROGRAM ADAPTER CY25701FJXC
Lead Free Status / Rohs Status
Not Compliant
Other names
428-1458
Features
Cypress Semiconductor Corporation
Document #: 38-07633 Rev. *E
Logic Block Diagram
Wide operating output (SSCLK) frequency range
Programmable spread spectrum with nominal 31.5 kHz
modulation frequency
Center spread: ±0.25% to ±2.5%
Down spread: –0.5% to –5.0%
Input frequency range
Integrated phase-locked loop (PLL)
Programmable crystal load capacitor tuning array
Low cycle-to-cycle jitter
3.3V operation with 2.5V output clock drive option
Spread spectrum On and Off function
Power down or Output Enable function
Output frequency select option
Field-programmable
Package: 16 pin TSSOP
3–200 MHz
External crystal: 8–30 MHz fundamental crystals
External reference: 8–166 MHz clock
XIN/CLKIN
XOUT
C
XOUT
16
1
C
OSC.
XIN
Q
Φ
VDD
2
P
AVDD
198 Champion Court
VCO
3
PLL
AVSS
5
VSS
Clock Generator for EMI Reduction
13
VDDL
Programmable Spread Spectrum
11
Benefits
Divider
Bank 1
Divider
Bank 2
Suitable for most PC peripherals, networking, and consumer
applications.
Provides wide range of spread percentages for maximum EMI
reduction to meet regulatory agency Electro Magnetic
Compliance (EMC) requirements. Reduces development and
manufacturing costs and time to market.
Eliminates the need for expensive and difficult to use higher
order crystals.
Internal PLL generates up to 200 MHz outputs; also generates
custom frequencies from an external crystal or a driven source.
Enables fine tuning of output clock frequency by adjusting
C
capacitors.
Application compatibility in standard and low power systems.
Provides ability to enable or disable spread spectrum with an
external pin.
Enables low power state or output clocks to High-Z state.
Enables quick generation of sample prototype quantities.
VSSL
6
Load
of the crystal. Eliminates the need for external C
CP0
4
San Jose
CP1
10
Output
Select
Matrix
,
CA 95134-1709
14
15
7
12
8
9
SSCLK2
SSCLK1
SSCLK3
SSCLK4
SSCLK5/REFOUT/CP2
SSCLK6/REFOUT/CP3
Revised May 22, 2008
CY25200
408-943-2600
Load
[+] Feedback

Related parts for CY3672

CY3672 Summary of contents

Page 1

... Q Φ OSC. XOUT XOUT XIN Cypress Semiconductor Corporation Document #: 38-07633 Rev. *E Programmable Spread Spectrum Clock Generator for EMI Reduction Benefits ■ Suitable for most PC peripherals, networking, and consumer applications. ■ Provides wide range of spread percentages for maximum EMI reduction to meet regulatory agency Electro Magnetic Compliance (EMC) requirements ...

Page 2

Pin Configuration General Description The CY25200 is a Spread Spectrum Clock Generator (SSCG) IC used to reduce Electro Magnetic Interference (EMI) found in today’s high speed digital electronic systems. The device uses a Cypress proprietary Phase-Locked Loop (PLL) and Spread ...

Page 3

... MHz ENTER DATA ENTER DATA and make sure to check the “non-standard devices” box. For more information on the registration process refer to the CY3672 data sheet. For information programming solutions, please contact your local Cypress Sales or Field Application Engineer (FAE), representative for details. ...

Page 4

Product Functions Control Pins (CP0, CP1, CP2 and CP3) There are four control signals available through programming of pins 4, 10, 14, and 15. CP0 (pin 4) and CP1 (pin10) are specifically designed to function as control pins. However pins ...

Page 5

Table 4. Using Clock Select, CLKSEL Control Pin Input Frequency CLKSEL (MHz) (Pin 4) 14.318 CLKSEL = 0 CLKSEL = 1 Figure 3. Using Clock Select, CLKSEL Control Pin Configuration Pinout Document #: 38-07633 Rev. *E SSCLK1 SSCLK2 SSCLK3 (Pin ...

Page 6

Switching Waveforms Figure 5. Output Rise and Fall Time (SSCLK and REFCLK) OUTPUT Tr Output Rise time (Tr Output Fall time (Tf Refer to AC Electrical Characteristics table for SR (Slew Rate) ...

Page 7

Informational Graphs The informational graphs are meant to convey the typical performance levels. No performance specifications is implied or guaranteed. Refer to the tables on 3 and 5 for device specifications. 172.5 171.5 Spread Spectrum Profile: Fnom=166MHz, Fmod=30kHz, Spread%= -4% ...

Page 8

Absolute Maximum Rating Supply Voltage (VDD)....................................... –0.5 to +7.0V DC Input Voltage ......................................–0. Storage Temperature (non-condensing) ..... –55°C to +125°C Junction Temperature ................................ –40°C to +125°C Recommended Crystal Specifications Parameter Description F Nominal Crystal Frequency NOM C Nominal ...

Page 9

AC Electrical Specifications Parameter Description DC Output Duty Cycle Output Duty Cycle SR1 Rising/Falling Edge Slew Rate SSCLK1/2/3/4 < 100 MHz, V Rising/Falling Edge Slew Rate SSCLK1/2/3/4 ≥ 100 MHz, V SR2 SR3 Rising/Falling Edge Slew Rate SSCLK1/2/3/4 < 100 ...

Page 10

... TSSOP – Tape and Reel (Pb Free) CY25200KZXC_XXXW 16-lead TSSOP (Pb Free) CY25200KZXC_XXXWT 16-lead TSSOP – Tape and Reel (Pb Free) CY25200KFZXC 16-lead TSSOP (Pb Free) CY3672 FTG Development Kit CY3672-PRG FTG Programmer CY3695 CY22050F/CY22150F/CY25200F Socket Adapter Table 5. 16-lead TSSOP Package Characteristics Parameter θ theta JA ...

Page 11

... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...

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