ADC1175-50EVAL National Semiconductor, ADC1175-50EVAL Datasheet - Page 6
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ADC1175-50EVAL
Manufacturer Part Number
ADC1175-50EVAL
Description
BOARD EVALUATION FOR ADC1175-50
Manufacturer
National Semiconductor
Datasheet
1.ADC1175-50EVAL.pdf
(18 pages)
Specifications of ADC1175-50EVAL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*ADC1175-50EVAL
www.national.com
V
V
V
V
V
Power Supply Characteristics
IA
ID
IAV
IDV
CLK, OE Digital Input Characteristics
V
V
I
I
C
Digital Output Characteristics
I
I
I
I
AC Electrical Characteristics
f
f
t
t
t
t
t
t
ENOB
IH
IL
OH
OL
OZH
OZL
C1
C2
OD
DS
AJ
OH
EN
DIS
Symbol
RT
RB
RTS
RBS
RT
IH
IL
IN
DD
DD
DD
DD
,
- V
-
+
RB
Reference Top Self Bias Voltage
Reference Bottom Self Bias
Voltage
Self Bias Voltage Delta
Reference Voltage Delta
Analog Supply Current
Digital Supply Current
Total Operating Current
Power Consumption
Logical High Input Voltage
Logical Low Input Voltage
Logical High Input Current
Logic Low Input Current
Logic Input Capacitance
High Level Output Current
Low Level Output Current
Tri-State® Leakage Current
Maximum Conversion Rate
Minimum Conversion Rate
Output Delay
Pipeline Delay (Latency)
Sampling (Aperture) Delay
Aperture Jitter
Output Hold Time
OE Low to Data Valid
OE High to High Z State
Effective Number of Bits
Parameter
V
V
V
V
V
V
V
V
DV
DV
DV
DV
DV
(Note 10)
DV
DV
DV
DV
V
V
DV
DV
DV
OE = DV
= 0V or V
CLK rise to data rising
CLK rise to data falling
CLK low to acquisition of data
CLK high to data invalid
Loaded as in Figure 2
Loaded as in Figure 2
f
f
f
f
IN
IN
IN
IN
RT
RB
RT
RB
RT
RB
RT
RB
IH
IL
= 1.31 MHz, V
= 4.43 MHz, V
= 9.9 MHz, V
= 4.43 MHz, f
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
= 0V, DV
= DV
connected to V
connected to V
connected to V
connected to V
connected to V
connected to V
connected to V
connected to AV
= AV
= AV
AV
AV
= AV
= AV
= AV
= AV
= AV
= 4.75V, V
= 4.75V, V
= 5.25V
DD
DD
DD
DD
OH
DD
DD
DD
DD
DD
DD
DD
, V
= AV
=5.25V, f
=5.25V, f
DD
= DV
=5.25V
=5.25V
=5.25V, CLK Low
=5.25V, f
=5.25V, f
= +5.25V
= +5.25V
OL
= AV
IN
CLK
DD
OH
OL
IN
IN
DD
= FS - 2 LSB
Conditions
RTS
RBS
RTS
RBS
RTS
RBS
RTS
= FS - 2 LSB
= FS - 2 LSB
= 0.4V
= +5.25V
= 2.4V
= 30 MHz
6
DD
SS
CLK
CLK
,
,
CLK
CLK
= +5.25V
= 20 MHz
= 30 MHz
= 20 MHz
= 30 MHz
(Note 9)
Typical
19.5
±20
2.6
0.6
2.3
9.5
2.5
9.6
2.5
7.5
7.3
7.2
6.5
12
13
60
65
−5
30
16
30
10
11
15
2
2
5
5
1
3
(Note 9)
Limits
−1.1
0.55
0.65
1.89
2.15
1.0
2.8
3.0
1.0
1.6
7.0
17
85
20
Clock Cycles
mW (max)
MHz (min)
mA (max)
mA (max)
Bits (min)
µA (max)
mA (min)
µA (min)
V (max)
V (max)
V (max)
V (min)
V (min)
V (min)
ps rms
Units
MHz
mW
mA
mA
mA
µA
µA
µA
pF
ns
ns
ns
ns
ns
ns
V
V