M5307C3 Freescale Semiconductor, M5307C3 Datasheet - Page 74

• Manufacturer Part Number: M5307C3
• Description: KIT EVALUATION FOR MCF5307
• Manufacturer: Freescale Semiconductor
• Series: ColdFire®r
• Type: Microprocessorr

Specifications of M5307C3

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MCF5307
• Interface Type: Ethernet
• For Use With/related Products: MCF5307
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

The duration of the Watchdog is selected by BMT0-1 bits in System Protection
Register. The dBUG initializes this register with the value 00, which provides
for 1024 system clock time-out but dBUG does not enable it.
3.1.6.
The ColdFire® family of processors can receive interrupts for seven levels of
interrupt priorities. When the processor receives an interrupt
priority than the current interrupt
interrupt acknowledge
interrupt acknowledge
request is being acknowledged
vector number to indicate where the service routine for this interrupt level is
located. If the source of interrupt is not capable of providing a vector, its
interrupt should be set up as autovector interrupt which directs the processor
to a predefined entry into the exception table (refer to the MCF5307
Manual).
The processor goes to a exception routine via the exception table.
in the Flash and the VBR points to it. However, a copy of this table is made in
the RAM starting at $00000000.
address of the exception handler in the appropriate vector in the vector table
located at $00000000, and then points the VBR to $00000000.
The MCF5307
external interrupt request pins to level 1, 3, 5, and 7 or levels 2, 4, 6, and 7.
The M5307C3
internal interrupt requests from Timer1, Timer2, Software watchdog
UART1, UART2, and MBUS.
programmed
relative priority between 0 to 3 will be assigned.
However, the software watchdog
uninitialized vector. The UART1 is programmed
autovector. The UART2 is programmed
The M-Bus is at Level 3, priority 0 and autovector. The Timers are at Level 5
with Timer 1 with priority 3 and Timer 2 with priority 2 and both for
autovector.
NOTE:
No interrupt sources should have the same level and priori
Interrupt
for any priority level. In case of similar priority level, a second
has four external interrupt request lines. You can program the
configures these lines as level 1, 3, 5, and 7. There are also six
Freescale Semiconductor, Inc.
Sources
cycle indicates to the source of the interrupt that the
cycle at the end of the current instruction cycle. This
For More Information On This Product,
Each interrupt source, external and internal, can be
Go to: www.freescale.com
as
and the device should provide the proper
To set an exception vector, the user places
mask (in status register), it will perform an
is programmed
another.
50
for Level 3, priority 1 and autovector.
for Level 3, priority 2 and
for Level 7, priority 2 and
which has higher
This table is
timer,
User's
the