MPC566EVB Freescale Semiconductor, MPC566EVB Datasheet - Page 6

KIT EVALUATION FOR MPC565/566

MPC566EVB

Manufacturer Part Number
MPC566EVB
Description
KIT EVALUATION FOR MPC565/566
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC566EVB

Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Detailed Feature List
1.2.11.2 22-Channel Modular I/O System (MIOS14)
1.2.12 Two Enhanced Queued Analog-to-Digital Converter
1.2.13 Three CAN 2.0B Controller (TouCAN) Modules
6
22-channel MIOS timer (MIOS14)
Six modulus counter submodules (MCSM)
— Four additional MCSM submodules compared to MIOS1
10 double action submodules (DASM).
12 dedicated PWM submodules (PWMSM)
— Four additional PWM submodules compared to MIOS1 (shared with MIOS GPIO pins)
MIOS real-time clock submodule (MRTCSM) provides low power clock/counter
— Requires external 32-KHz crystal
— Uses four pins: two for 32-KHz crystal, two for power/ground.
Two enhanced queued analog to digital converters (QADC64E A, QADC64E B) with AMUXes
for 40 total analog channels.
10 bit A/D converter with internal sample/hold
— Typical conversion time is 4 µs (250-Kbyte samples/sec)
— Two conversion command queues of variable length
Automated queue modes initiated by:
— External edge trigger/level gate
— Software command
— Periodic/interval timer, assignable to both queue 1 and 2
64 result registers in each QADC64E module
— Output data is right or left justified, signed or unsigned
Synchronized clock mode allows both QADC64Es to see the same conversion clock. This allows
the two modules to look like one large QADC with four queues.
Conversions alternate reference (ALTREF) pin. This pin can be connected to a different reference
voltage
Three TouCAN modules (TouCAN_A, TouCAN_B, and TouCAN_C)
16 message buffers each, programmable I/O modes
Maskable interrupts
Programmable loopback for self-test operation
Independent of the transmission medium (external transceiver is assumed)
Open network architecture, multimaster concept
High immunity to EMI
Short latency time for high-priority messages
Low power sleep mode, with programmable wake up on bus activity
TouCAN_C pins shared with MIOS14 GPIO pins
Modules (QADC64E)
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC565/MPC566 Product Brief
Go to: www.freescale.com
MOTOROLA

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