MC44BS373CAFCEVK Freescale Semiconductor, MC44BS373CAFCEVK Datasheet - Page 8

• Manufacturer Part Number: MC44BS373CAFCEVK
• Description: KIT EVAL FOR BS373CAFC 16PIN
• Manufacturer: Freescale Semiconductor

Specifications of MC44BS373CAFCEVK

• Main Purpose: Audio Video Integration Modulator
• Utilized Ic / Part: MC44BS373CA
• Interface Type: I2C
• Operating Temperature Range: + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: MC44BS373CA

I2C Bit Mapping
I2C Bit Mapping
9 I
Chip address
C1—High-order bits
C0—Low-order bits
FM—High-order bits
FL—Low-order bits
Chip address
R—Status byte
X0–X5
Name
SYSL
PWC
OSC
LOP
ATT
SO
PS
Write Mode
Read Mode
2
C Bit Mapping
Sound oscillator on/off
0 Sound oscillator on (normal mode)
1 Sound oscillation disabled (oscillator and PLL section bias turned off)
Logic output port
0 LOP pin is low voltage.
1 LOP pin is high impedance.
Picture-to-sound carrier ratio
0 Picture-to-sound carrier ratio is 12 dB.
1 Picture-to-sound carrier ratio is 16 dB.
Test mode bits
Note: All bits are 0 for normal operation. For further information, see Table 17 and Table 18.
System L enable—Selects AM sound and positive video modulation
0 System B/G enabled, system L disabled (FM sound and negative video modulation)
1 System L enabled, system B/G disabled (AM sound and positive video modulation)
Peak white clip enable/disable
0 Peak white clip on (system B/G)
1 Peak white clip off (system L)
UHF oscillator on/off
0 Normal operation
1 UHF oscillator disabled (oscillator and PLL sections bias turned off)
Modulator output attenuated-sound and video modulators on/off
0 Normal operation
1 Modulator output attenuation (sound and video modulators sections bias turned off)
PWC
Bit 7
Bit 7
N5
—
1
1
0
1
Table 10. I
TPEN
Bit 6
OSC
Bit 6
Table 8. I
Table 9. I
N4
—
1
0
1
MC44BS373CA Data Sheet
2
C Bit Mapping Bit Descriptions
Bit 5
Bit 5
ATT
2
N11
2
SO
N3
—
C Write-Mode Bit Mapping
C Read-Mode Bit Mapping
0
0
SFD1
Bit 4
Bit 4
LOP
N10
N2
Description
—
0
0
SFD0
Bit 3
Bit 3
PS
N9
N1
—
1
1
SREF
Bit 2
Bit 2
See Table 12.
See Table 11.
X3
N8
N0
Y2
Bit 1
Bit 1
X2
X5
N7
X1
Y1
SYSL
OOR
Bit 0
Bit 0
N6
X4
X0
0
1
ACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
—