CA3318CE Intersil, CA3318CE Datasheet
CA3318CE
Specifications of CA3318CE
Related parts for CA3318CE
CA3318CE Summary of contents
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... Radar Pulse Analysis • Motion Signature Analysis • µP Data Acquisition Systems Part Number Information PART NUMBER LINEARITY (INL, DNL) ±1.5 LSB CA3318CE ±1.5 LSB CA3318CM ±1.5 LSB CA3318CD Pinout CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. ...
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Functional Block Diagram φ φ φ ANALOG SUPPLY REF / 2Ω REF 7Ω ...
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Absolute Maximum Ratings DC Supply Voltage Range ( -0. (Referenced Terminal, Whichever is More Negative Input ...
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Electrical Specifications All Reference Points Adjusted, Unless Otherwise Specified (Continued) PARAMETER DIGITAL INPUTS Low Level Input Voltage CE1, CE2 Phase, CLK High Level Input Voltage CE1, CE2 Phase, CLK Input Leakage ...
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Timing Waveforms (Continued) CE1 CE2 t DIS BITS DATA OF AUTO BALANCE CLOCK NO MAX LIMIT DATA FIGURE 3A. STANDBY IN INDEFINITE AUTO BALANCE (SHOWN WITH PHASE = LOW) SAMPLE CLOCK N 500ns MAX DATA FIGURE 3B. ...
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Typical Performance Curves (MHz) S FIGURE 4. DEVICE CURRENT vs SAMPLE FREQUENCY 8 15MHz 1MHz S I 7.8 7.6 7.4 7.2 7.0 6.8 6.6 6.4 6.2 ...
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Typical Performance Curves 8.0 7.6 7.2 6.8 6.4 6.0 5.6 5.2 4.8 4.4 4.0 Pin Descriptions PIN NAME DESCRIPTION 1 B1 Bit 1 (LSB Bit Bit Bit Bit 5 ...
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At the same time a second set of commutating capacitors and amplifiers is also auto-balanced. The balancing of the second-stage amplifier at its intrinsic trip point removes any tracking differences between the first and second amplifier stages. The cascaded auto-balance ...
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TO 30V + INPUT 3 18Ω CA3085E (NOTE IOT 10µF, TAN (NOTE) 1.5K NOTE: Bypass analog GND near A/D with 0.1µF ceramic REF cap. Parts noted should have low ...
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Signal-to-Noise + Distortion Ratio (SINAD) SINAD is the measured RMS signal to RMS sum of all other spectral components below the Nyquist frequency excluding DC. Effective Number of Bits (ENOB) The effective number of bits (ENOB) is derived from the ...
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TANTALUM A +4V TO +6.5V REFERENCE OPTIONAL CAP (SEE TEXT) 0.01µF CLOCK SOURCE INPUT SIGNAL AMPLIFIER/BUFFER (SEE TEXT) FIGURE 14. TYPICAL CIRCUIT CONFIGURATION FOR THE CA3318 WITH NO LINEARITY ADJUST AMP SIGNAL SOURCE SIGNAL GROUND - + ANALOG SUPPLIES ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reli- able. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...