PIC16F688-I/SL Microchip Technology, PIC16F688-I/SL Datasheet - Page 49

IC PIC MCU FLASH 4KX14 14SOIC

PIC16F688-I/SL

Manufacturer Part Number
PIC16F688-I/SL
Description
IC PIC MCU FLASH 4KX14 14SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F688-I/SL

Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SCI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
1
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT14SO-1 - SOCKET TRANSITION 14SOIC 150/208AC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PIC16F688-I/SL
0
5.4
An 8-bit counter is available as a prescaler for the
Timer0 module, or as a postscaler for the Watchdog
Timer. For simplicity, this counter will be referred to as
“prescaler” throughout this data sheet. The prescaler
assignment is controlled in software by the control bit
PSA (OPTION_REG<3>). Clearing the PSA bit will
assign the prescaler to Timer0. Prescale values are
selectable via the PS<2:0> bits (OPTION_REG<2:0>).
The prescaler is not readable or writable. When
assigned to the Timer0 module, all instructions writing
to the TMR0 register (e.g., CLRF 1,
BSF 1, x....etc.) will clear the prescaler. When
assigned to WDT, a CLRWDT instruction will clear the
prescaler along with the Watchdog Timer.
5.4.1
The prescaler assignment is fully under software control
(i.e., it can be changed “on-the-fly” during program
execution). To avoid an unintended device Reset, the
following instruction sequence (Example 5-1 and
Example 5-2) must be executed when changing the
prescaler assignment from Timer0 to WDT.
TABLE 5-1:
 2004 Microchip Technology Inc.
01h
0Bh/8Bh
81h
85h/185h TRISA
Legend: - = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the Timer0 module.
Address
Prescaler
TMR0
INTCON
OPTION_REG
SWITCHING PRESCALER
ASSIGNMENT
Name
REGISTERS ASSOCIATED WITH TIMER0
Timer0 Module register
RAPU
Bit 7
GIE
INTEDG
PEIE
Bit 6
TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 --11 1111 --11 1111
MOVWF 1,
T0CS
Bit 5
T0IE
Preliminary
T0SE
INTE
Bit 4
RAIE
Bit 3
PSA
EXAMPLE 5-1:
To change prescaler from the WDT to the TMR0
module, use the sequence shown in Example 5-2. This
precaution must be taken even if the WDT is disabled.
EXAMPLE 5-2:
BCF
CLRWDT
CLRF
BSF
MOVLW
MOVWF
CLRWDT
MOVLW
MOVWF
BCF
CLRWDT
BSF
MOVLW
MOVWF
BCF
Bit 2
T0IF
PS2
STATUS,RP0
TMR0
STATUS,RP0
b’00101111’
OPTION_REG
b’00101xxx’
OPTION_REG
STATUS,RP0
STATUS,RP0
b’xxxx0xxx’
OPTION_REG
STATUS,RP0
Bit 1
INTF
PS1
CHANGING PRESCALER
(TIMER0 WDT)
CHANGING PRESCALER
(WDT TIMER0)
RAIF
Bit 0
PS0
PIC16F688
;Bank 0
;Clear WDT
;Clear TMR0 and
; prescaler
;Bank 1
;Required if desired
; PS2:PS0 is
; 000 or 001
;
;Set postscaler to
; desired WDT rate
;Bank 0
;Clear WDT and
; prescaler
;Bank 1
;Select TMR0,
; prescale, and
; clock source
;
;Bank 0
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
1111 1111 1111 1111
POR, BOD
Value on
DS41203B-page 47
Value on
all other
Resets

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