PIC16F688-I/SL Microchip Technology, PIC16F688-I/SL Datasheet - Page 74

• Manufacturer Part Number: PIC16F688-I/SL
• Description: IC PIC MCU FLASH 4KX14 14SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-I/SL

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 1
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT14SO-1 - SOCKET TRANSITION 14SOIC 150/208AC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F688
REGISTER 9-1:
REGISTER 9-2:
REGISTER 9-3:
DS41203B-page 72
bit 7-0
bit 7-0
bit 7
bit 6-4
bit 3
bit 2
bit 1
bit 0
EEDAT – EEPROM DATA REGISTER (ADDRESS: 9Ah)
EECON1 – EEPROM CONTROL REGISTER 1 (ADDRESS: 9Ch)
bit 7
bit 7
EEDATn: Byte Value to Write to or Read From Data EEPROM bits
bit 7
EEADR: Specifies One of 256 Locations for EEPROM Read/Write Operation bits
EEPGD: Program/Data EEPROM Select bit
1 = Accesses program memory
0 = Accesses data memory
Unimplemented: Read as ‘0’
WRERR: EEPROM Error Flag bit
1 = A write operation is prematurely terminated (any MCLR Reset, any WDT Reset during
0 = The write operation completed
WREN: EEPROM Write Enable bit
1 = Allows write cycles
0 = Inhibits write to the data EEPROM
WR: Write Control bit
EEPGD = 1:
This bit is ignored
EEPGD = 0:
1 = Initiates a write cycle (The bit is cleared by hardware once write is complete. The WR bit can only be
0 = Write cycle to the data EEPROM is complete
RD: Read Control bit
1 = Initiates an memory read (Read takes one cycle. RD is cleared in hardware. The RD bit can only be
0 = Does not initiate an memory read
Legend:
R = Readable bit
- n = Value at POR
Legend:
R = Readable bit
- n = Value at POR
Legend:
S = Bit can only be set
R = Readable bit
- n = Value at POR
EEADR7
EEADR – EEPROM ADDRESS REGISTER (ADDRESS: 9Bh)
EEDAT7
EEPGD
R/W-0
R/W-0
R/W-0
normal operation or BOD detect)
set, not cleared, in software.)
set, not cleared, in software.)
EEADR6
EEDAT6
R/W-0
R/W-0
U-0
—
EEADR5
EEDAT5
R/W-0
R/W-0
U-0
Preliminary
—
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
EEADR4
EEDAT4
R/W-0
R/W-0
U-0
—
WRERR
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EEADR3
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EEDAT3
R/W-x
R/W-0
R/W-0
WREN
R/W-0
EEADR2
EEDAT2
R/W-0
R/W-0
 2004 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
EEADR1
EEDAT1
R/S-0
R/W-0
R/W-0
WR
EEADR0
EEDAT0
R/W-0
R/W-0
R/S-0
RD
bit 0
bit 0
bit 0