ATTINY2313V-10MU Atmel, ATTINY2313V-10MU Datasheet - Page 33

10MHZ MLF IND TEMP GREEN

ATTINY2313V-10MU

Manufacturer Part Number
ATTINY2313V-10MU
Description
10MHZ MLF IND TEMP GREEN
Manufacturer
Atmel
Series
AVR® ATtinyr

Specifications of ATTINY2313V-10MU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-MLF®, QFN
Processor Series
ATTINY2x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SPI/UART/USI
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
18
Number Of Timers
2
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q2312268B

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY2313V-10MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
System Control
and Reset
Resetting the AVR
Reset Sources
2543L–AVR–08/10
During reset, all I/O Registers are set to their initial values, and the program starts execution
from the Reset Vector. The instruction placed at the Reset Vector must be an RJMP – Relative
Jump – instruction to the reset handling routine. If the program never enables an interrupt
source, the Interrupt Vectors are not used, and regular program code can be placed at these
locations. The circuit diagram in
parameters of the reset circuitry.
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes
active. This does not require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal
reset. This allows the power to reach a stable level before normal operation starts. The time-out
period of the delay counter is defined by the user through the SUT and CKSEL Fuses. The dif-
ferent selections for the delay period are presented in
The ATtiny2313 has four sources of reset:
Figure 14. Reset Logic
Power-on Reset. The MCU is reset when the supply voltage is below the Power-on Reset
threshold (V
External Reset. The MCU is reset when a low level is present on the RESET pin for longer
than the minimum pulse length.
Watchdog Reset. The MCU is reset when the Watchdog Timer period expires, the Watchdog
is enabled, and Watchdog Interrupt is disabled.
Brown-out Reset. The MCU is reset when the supply voltage V
Reset threshold (V
BODLEVEL [2..0]
POT
).
BOT
Pull-up Resistor
) and the Brown-out Detector is enabled.
FILTER
SPIKE
Figure 14
CKSEL[3:0]
Power-on Reset
Reset Circuit
SUT[1:0]
Brown-out
Watchdog
Oscillator
Generator
Circuit
Clock
shows the reset logic.
CK
Register (MCUSR)
MCU Status
DATA BUS
Delay Counters
“Clock Sources” on page
Table 15
CC
TIMEOUT
is below the Brown-out
defines the electrical
23.
33

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