PIC16F1937-I/P Microchip Technology, PIC16F1937-I/P Datasheet - Page 13

IC PIC MCU FLASH 512KX14 40-PDIP

PIC16F1937-I/P

Manufacturer Part Number
PIC16F1937-I/P
Description
IC PIC MCU FLASH 512KX14 40-PDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F1937-I/P

Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART/MI2C/SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
36
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
14-ch x 10-bit
A/d Bit Size
10 bit
A/d Channels Available
14
Height
4.95 mm
Length
53.21 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Width
14.73 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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0
4.0
In Program/Verify mode, the program memory and the
configuration memory can be accessed and pro-
grammed in serial fashion. ICSPDAT and ICSPCLK
are used for the data and the clock, respectively. All
commands and data words are transmitted LSb first.
Data changes on the rising edge of the ICSPCLK and
latched on the falling edge. In Program/Verify mode
both the ICSPDAT and ICSPCLK are Schmitt Trigger
inputs. The sequence that enters the device into
Program/Verify mode places all other logic into the
Reset state. Upon entering Program/Verify mode, all
I/O’s are automatically configured as high-impedance
inputs and the address is cleared.
4.1
There
Program/Verify mode via high-voltage:
• V
• V
4.1.1
To enter Program/Verify mode via the V
the following sequence must be followed:
1.
2.
3.
The V
code prior to entering Program/Verify mode. For
example, when the Configuration Word has MCLR
disabled (MCLRE = 0), the power-up time is disabled
(PWRTE = 0), the internal oscillator is selected
(F
application, the device will execute code. Since this
may prevent entry, V
recommended. See the timing diagram in Figure 8-3.
4.1.2
To enter Program/Verify mode via the V
the following sequence must be followed:
1.
2.
3.
The V
device when V
sary to disconnect V
See the timing diagram in Figure 8-2.
© 2008 Microchip Technology Inc.
OSC
PP
DD
Hold ICSPCLK and ICSPDAT low. All other pins
should be unpowered.
Raise the voltage on MCLR from 0V to V
Raise the voltage on V
desired operating voltage.
Hold ICSPCLK and ICSPDAT low.
Raise the voltage on V
operating voltage.
Raise the voltage on MCLR from V
to V
PP
DD
= 100), and RB6 and RB7 are driven by the user
– First entry mode
– First entry mode
are
-first entry prevents the device from executing
IHH
-first method is useful when programming the
PROGRAM/VERIFY MODE
High-Voltage Program/Verify Mode
Entry and Exit
.
V
V
PP
DD
two
DD
– FIRST ENTRY MODE
– FIRST ENTRY MODE
is already applied, for it is not neces-
different
DD
PP
to enter Program/Verify mode.
-first entry mode is strongly
DD
from 0V to the desired
DD FROM
methods
DD
PP
DD
0V to the
of
-first method
-first method
or below
Advance Information
IHH
entering
.
4.1.3
To exit Program/Verify mode take MCLR to V
lower (V
4.2
The Low-Voltage Programming mode allows the
PIC16F193X/LF193X devices to be programmed using
V
Configuration Word 2 register is set to '1', the
low-voltage ICSP programming entry is enabled. To
disable the Low-Voltage ICSP mode, the LVP bit must
be programmed to '0'. This can only be done while in
the High-Voltage Entry mode.
Entry into the Low-Voltage ICSP Program/Verify modes
requires the following steps:
1.
2.
The key sequence is a specific 32-bit pattern, '0100
1101 0100 0011 0100 1000 0101 0000' (more
easily remembered as MCHP in ASCII). The device will
enter Program/Verify mode only if the sequence is
valid. The Least Significant bit of the Least Significant
nibble must be shifted in first.
Once the key sequence is complete, MCLR must be
held at V
maintained.
For low-voltage programming timing, see Figures 8-9
and 8-10.
Exiting Program/Verify mode is done by no longer
driving MCLR to V
PIC16F193X/LF193X
DD
MCLR is brought to V
A 32-bit key sequence is presented on
ICSPDAT, while clocking ICSPCLK.
only, without high voltage. When the LVP bit of the
IL
IL
Low-Voltage Programming (LVP)
Mode
). See Figures 8-4 and 8-5.
for as long as Program/Verify mode is to be
PROGRAM/VERIFY MODE EXIT
IL
. See Figures 8-9 and 8-10.
IL
.
DS41360A-page 13
DD
or

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