PIC16F1937-I/P Microchip Technology, PIC16F1937-I/P Datasheet - Page 7

• Manufacturer Part Number: PIC16F1937-I/P
• Description: IC PIC MCU FLASH 512KX14 40-PDIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1937-I/P

• Program Memory Type: FLASH
• Program Memory Size: 14KB (8K x 14)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART/MI2C/SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14-ch x 10-bit
• A/d Bit Size: 10 bit
• A/d Channels Available: 14
• Height: 4.95 mm
• Length: 53.21 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Width: 14.73 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

NO PAGING SURPRISES
The primary advantage to using relative branches is to
eliminate the possibility of software that works until
additional code is added. Sometimes, a simple delay
loop will fail because code inserted ahead of the loop
pushed the loop across a page boundary. These
surprises are eliminated with the use of a relative
branch.
FIGURE 3:
FSR MEMORY MAP
The large addressing space of the new FSRs provides
the ability to access additional memory besides the
GPR and SFR memory spaces (see Figure 3). The
FSR memory map includes the legacy GPR/SFR
space. In addition, the GPR memory is mirrored into a
linear region to allow large memory blocks to be
accessed via the indirect addressing modes. Lastly, the
low byte of each program memory address is also
mapped into the FSR address space. These two addi-
© 2009 Microchip Technology Inc.
Note 1: Accessing these addresses via FSR causes the instructions to use 1 additional cycle.
FSR Addresses
FSR Addresses
FSR MEMORY MAP
0xFFFF
0x0FFF
0x1FFF
0x29FF
0x2A00
0x7FFF
0x0000
0x1000
0x2000
0x8000
(1)
LINEAR GPR
RESERVED
RESERVED
PROGRAM
MEMORY
Region
GPRs
SRFs
&
Indirect Addressing
Indirect addressing allows an address to be computed
at run time and the data modified. Accessing arrays
and other memory buffers often requires indirect
addressing. The legacy PIC12/16 has very rudimentary
support for indirect addressing with a single FSR/INDF.
The enhanced PIC12/16 has extensive support for indi-
rect addressing.
tions to the memory map allow large memory blocks,
and pointers that access RAM and Flash. The result of
these changes is a large improvement in performance
for large data applications.
Accessible by
Addresses
BSR + File
Addresses
FSR Only
Program
Register
Counter
0x0FFF
0x7FFF
0x0000
0x0000
(1)
DS41375A-page 7