PIC18F25J11-I/ML Microchip Technology, PIC18F25J11-I/ML Datasheet - Page 359

• Manufacturer Part Number: PIC18F25J11-I/ML
• Description: IC PIC MCU FLASH 32K 2V 28-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F25J11-I/ML

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 16
• Ram Memory Size: 3.6875KB
• Cpu Speed: 48MHz
• No. Of Timers: 5
• Interface: EUSART, I2C, SPI
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3776 B
• Interface Type: EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136, MA180023
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

21.5
Each comparator has up to eight possible combina-
tions of inputs: up to four external analog inputs, and
one of two internal voltage references.
Both comparators allow a selection of the signal from
pin, CxINA, or the voltage from the comparator refer-
ence (CV
compared to either CxINB, CTMU or the microcon-
troller’s fixed internal reference voltage (V
nominal) on the inverting channel.
Table 21-1 provides the comparator inputs and outputs
tied to fixed I/O pins.
Figure 21-4
configurations and their corresponding bit settings.
TABLE 21-1:
21.5.1
Setting the CON bit of the CMxCON register
(CMxCON<7>) enables the comparator for operation.
Clearing the CON bit disables the comparator, resulting
in minimum current consumption.
The CCH<1:0> bits in the CMxCON register
(CMxCON<1:0>) direct either one of three analog input
pins, or the Internal Reference Voltage (V
comparator V
ing mode, either an external or internal voltage
reference may be used. The analog signal present at
V
output of the comparator is adjusted accordingly.
© 2009 Microchip Technology Inc.
IN
Comparator
- is compared to the signal at V
1
2
Comparator Control and
Configuration
REF
COMPARATOR ENABLE AND
INPUT SELECTION
IN
) on the non-inverting channel. This is
illustrates
-. Depending on the comparator operat-
COMPARATOR INPUTS AND
OUTPUTS
Input or Output
C1INA (V
C1INB (V
C2INA(V
C2INB(V
C1OUT
C2OUT
the
IN
IN
IN
IN
available
+)
+)
-)
-)
IN
+ and the digital
Remapped
Remapped
comparator
I/O Pin
IRV
RA0
RA3
RPn
RA1
RA2
RPn
IRV
), to the
, 0.6V
PIC18F46J11 FAMILY
The external reference is used when CREF = 0
(CMxCON<2>) and V
pin. When external voltage references are used, the
comparator module can be configured to have the
reference sources externally. The reference signal
must be between V
either pin of the comparator.
The comparator module also allows the selection of an
internally generated voltage reference (CV
the comparator voltage reference module. This module
is described in more detail in Section 21.0 “Compara-
tor Module”. The reference from the comparator
voltage reference module is only available when
CREF = 1. In this mode, the internal voltage reference
is applied to the comparator’s V
21.5.2
The comparator outputs are read through the CMSTAT
register. The CMSTAT<0> reads the Comparator 1 out-
put and CMSTAT<1> reads the Comparator 2 output.
These bits are read-only.
The comparator outputs may also be directly output to
the RPn I/O pins by setting the COE bit (CMxCON<6>).
When enabled, multiplexers in the output path of the
pins switch to the output of the comparator.
By default, the comparator’s output is at logic high
whenever the voltage on V
The polarity of the comparator outputs can be inverted
using the CPOL bit (CMxCON<5>).
The uncertainty of each of the comparators is related to
the input offset voltage and the response time given in
the specifications, as discussed in Section 21.2
“Comparator Operation”.
Note:
The comparator input pin selected by
CCH<1:0> must be configured as an input
by setting both the corresponding TRIS and
PCFG bits in the ANCON1 register.
COMPARATOR ENABLE AND
OUTPUT SELECTION
SS
IN
and V
+ is connected to the CxINA
IN
DD
+ is greater than on V
, and can be applied to
IN
+ pin.
DS39932C-page 359
REF
) from
IN
-.