AT90PWM3-16MQ Atmel, AT90PWM3-16MQ Datasheet - Page 35

• Manufacturer Part Number: AT90PWM3-16MQ
• Description: IC AVR MCU FLASH 8K 32QFN
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM3-16MQ

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-QFN
• Processor Series: AT90PWMx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 27
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• On-chip Dac: 10 bit, 1 Channel
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOICATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4317J–AVR–08/10
Table 7-9.
1.
2.
3.
Figure 7-4.
Ext Osc
CKSEL
Ext Clk
0101
0001
3..0
XTAL1
XTAL2
This value do not provide a proper restart ; do not use PD in this clock scheme
This value do not provide a proper restart ; do not use PD in this clock scheme
This value do not provide a proper restart ; do not use PD in this clock scheme
RC OSCILLATOR
SUT1..0
OSCCAL
Start-up Times when the PLL is selected as system clock
PCK Clocking System AT90PWM2/3
00
01
10
11
00
01
10
11
OSCILLATORS
8 MHz
Start-up Time from Power-down
and Power-save
DIVIDE
BY 8
16K CK
16K CK
6 CK
6 CK
6 CK
1K CK
1K CK
(1)
(2)
(3)
PLL
PLLE
64x
Detector
Lock
Reserved
DIVIDE
DIVIDE
PLLF
BY 2
BY 4
AT90PWM2/3/2B/3B
Additional Delay from Reset
14CK + 64 ms
14CK + 64 ms
14CK + 4 ms
14CK + 4 ms
14CK + 4 ms
(V
CLK
CC
PLOCK
CK
14CK
14CK
PLL
= 5.0V)
SOURCE
35