DSPIC33FJ12MC202-I/SO Microchip Technology, DSPIC33FJ12MC202-I/SO Datasheet - Page 114

IC DSPIC MCU/DSP 12K 28SOIC

DSPIC33FJ12MC202-I/SO

Manufacturer Part Number
DSPIC33FJ12MC202-I/SO
Description
IC DSPIC MCU/DSP 12K 28SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC202-I/SO

Program Memory Type
FLASH
Program Memory Size
12KB (12K x 8)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Data Ram Size
1 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240002, DM330021, DM330011
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164339 - MODULE SKT FOR PM3 28SOICDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ12MC202-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
DSPIC33FJ12MC202-I/SO
0
dsPIC33FJ12MC201/202
9.5
The
implement 21 registers for remappable peripheral
configuration:
• Input Remappable Peripheral Registers (13)
• Output Remappable Peripheral Registers (8)
REGISTER 9-1:
DS70265B-page 112
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-8
bit 7-0
Note:
U-0
U-0
dsPIC33FJ12MC201/202 family
Peripheral Pin Select Registers
Input and Output Register values can only
be changed if OSCCON[IOLOCK] = 0.
See Section 9.4.4.1 “Control Register
Lock” for a specific command sequence.
Unimplemented: Read as ‘0’
INT1R<4:0>: Assign External Interrupt 1 (INTR1) to the corresponding RPn pin
11111 = Input tied V
01111 = Input tied to RP15
.
.
.
00001 = Input tied to RP1
00000 = Input tied to RP0
Unimplemented: Read as ‘0’
U-0
U-0
RPINR0: PERIPHERAL PIN SELECT INPUT REGISTER 0
W = Writable bit
‘1’ = Bit is set
U-0
U-0
SS
of
devices
R/W-1
U-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
U-0
INT1R<4:0>
R/W-1
U-0
© 2007 Microchip Technology Inc.
x = Bit is unknown
R/W-1
U-0
R/W-1
U-0
bit 8
bit 0

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