PIC18F2510-I/SP Microchip Technology, PIC18F2510-I/SP Datasheet - Page 27

• Manufacturer Part Number: PIC18F2510-I/SP
• Description: IC MCU FLASH 16KX16 28-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2510-I/SP

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Number Of I /o: 25
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Ram Memory Size: 1.5KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

FIGURE 4-4:
4.5
A data EEPROM address may be read via a sequence
of core instructions (4-bit command, ‘0000’) and then
output on PGD via the 4-bit command, ‘0010’ (TABLAT
register). The result may then be immediately
compared to the appropriate data in the programmer’s
memory for verification. Refer to
Data EEPROM Memory”
reading data EEPROM.
4.6
The term “Blank Check” means to verify that the device
has no programmed memory cells. All memories must
be verified: code memory, data EEPROM, ID locations
and Configuration bits. The Device ID registers
(3FFFFEh:3FFFFFh) should be ignored.
A “blank” or “erased” memory cell will read as ‘1’. There-
fore, Blank Checking a device merely means to verify
that all bytes read as FFh, except the Configuration bits.
Unused (reserved) Configuration bits will read ‘0’ (pro-
grammed). Refer to
expect data for the various PIC18F2XXX/4XXX family
devices.
 2010 Microchip Technology Inc.
PGC
PGD
Verify Data EEPROM
Blank Check
1
0
2
1
3
0
Figure 4-5
SHIFT OUT DATA HOLDING REGISTER TIMING (0010)
4
0
for implementation details of
P5
PGD = Input
1
for blank configuration
2
Section 4.4 “Read
3
4
5
PIC18F2XXX/4XXX FAMILY
6
7
8
P6
9
Given that Blank Checking is merely code and data
EEPROM verification with FFh expect data, refer to
Section 4.4 “Read Data EEPROM Memory”
Section 4.2 “Verify Code Memory and ID Locations”
for implementation details.
FIGURE 4-5:
LSb
P14
10
1
11
2
PGD = Output
Blank Check Device
12
Shift Data Out
3
13
device
4
blank?
Abort
Start
Is
14
5
No
15
6
BLANK CHECK FLOW
16
MSb
P5A
Yes
Fetch Next 4-Bit Command
1
n
PGD = Input
2
Continue
DS39622L-page 27
n
3
n
4
n
and