DSPIC30F3014-30I/ML Microchip Technology, DSPIC30F3014-30I/ML Datasheet - Page 223

• Manufacturer Part Number: DSPIC30F3014-30I/ML
• Description: IC DSPIC MCU/DSP 24K 44QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F3014-30I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 24KB (8K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F301430IML

Timing Diagrams and Specifications
Timing Diagrams.See Timing Characteristics
Timing Requirements
 2010 Microchip Technology Inc.
CAN Module I/O........................................................ 205
CLKOUT and I/O....................................................... 185
DCI Module
External Clock........................................................... 181
Frame Sync, AC-Link Start-Of-Frame....................... 124
Frame Sync, Multichannel Mode .............................. 124
I
I
I
Input Capture (CAPx)................................................ 190
Low-Voltage Detect................................................... 178
OCx/PWM Module .................................................... 191
Oscillator Start-up Timer ........................................... 186
Output Compare Module........................................... 190
Power-up Timer ........................................................ 186
PWM Output ............................................................... 87
Reset......................................................................... 186
SPI Module
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Type A, B and C Timer External Clock ..................... 188
Watchdog Timer........................................................ 186
DC Characteristics - Internal RC Accuracy............... 183
A/D Conversion
Band Gap Start-up Time ........................................... 187
Brown-out Reset ....................................................... 187
CAN Module I/O........................................................ 205
CLKOUT and I/O....................................................... 185
DCI Module
External Clock........................................................... 182
I
I
Input Capture ............................................................ 190
Oscillator Start-up Timer ........................................... 187
Output Compare Module........................................... 190
Power-up Timer ........................................................ 187
Reset......................................................................... 187
Simple OCx/PWM Mode ........................................... 191
SPI Module
Type A Timer External Clock .................................... 188
Type B Timer External Clock .................................... 189
2
2
2
2
2
C Bus Data
C Bus Start/Stop Bits
S Interface Frame Sync.......................................... 124
C Bus Data (Master Mode)..................................... 201
C Bus Data (Slave Mode)....................................... 204
AC-Link Mode ................................................... 194
Multichannel, I
Master Mode ..................................................... 201
Slave Mode ....................................................... 203
Master Mode ..................................................... 201
Slave Mode ....................................................... 203
Master Mode (CKE = 0) .................................... 195
Master Mode (CKE = 1) .................................... 196
Slave Mode (CKE = 0) ...................................... 197
Slave Mode (CKE = 1) ...................................... 199
(MCLR Not Tied to V
(MCLR Not Tied to V
(MCLR Tied to V
Low-Speed........................................................ 209
AC-Link Mode ................................................... 195
Multichannel, I
Master Mode (CKE = 0) .................................... 196
Master Mode (CKE = 1) .................................... 197
Slave Mode (CKE = 0) ...................................... 198
Slave Mode (CKE = 1) ...................................... 200
2
2
S Modes ................................... 192
S Modes ................................... 193
DD
).......................................... 152
DD
DD
), Case 1...................... 152
), Case 2...................... 152
Trap Vectors ....................................................................... 63
U
UART Module
UART Operation
Unit ID Locations .............................................................. 141
Universal Asynchronous Receiver Transmitter
W
Wake-up from Sleep ......................................................... 141
Wake-up from Sleep and Idle ............................................. 64
Watchdog Timer
Watchdog Timer (WDT)............................................ 141, 155
WWW Address ................................................................. 225
WWW, On-Line Support ....................................................... 9
dsPIC30F3014/4013
Type C Timer External Clock.................................... 189
Watchdog Timer ....................................................... 187
Address Detect Mode ............................................... 107
Auto-Baud Support ................................................... 108
Baud Rate Generator ............................................... 107
Enabling and Setting Up........................................... 105
Framing Error (FERR) .............................................. 107
Idle Status................................................................. 107
Loopback Mode ........................................................ 107
Operation During CPU Sleep and Idle Modes.......... 108
Overview................................................................... 103
Parity Error (PERR) .................................................. 107
Receive Break .......................................................... 107
Receive Buffer (UxRXB)........................................... 106
Receive Buffer Overrun Error (OERR Bit) ................ 106
Receive Interrupt ...................................................... 106
Receiving Data ......................................................... 106
Receiving in 8-Bit or 9-Bit Data Mode ...................... 106
Reception Error Handling ......................................... 106
Transmit Break ......................................................... 106
Transmit Buffer (UxTXB) .......................................... 105
Transmit Interrupt ..................................................... 106
Transmitting Data ..................................................... 105
Transmitting in 8-Bit Data Mode ............................... 105
Transmitting in 9-Bit Data Mode ............................... 105
UART1 Register Map ............................................... 109
UART2 Register Map ............................................... 109
Idle Mode.................................................................. 108
Sleep Mode .............................................................. 108
(UART) Module......................................................... 103
Timing Requirements ............................................... 187
Enabling and Disabling............................................. 155
Operation.................................................................. 155
DS70138G-page 223