PIC24FJ128GA106-I/PT Microchip Technology, PIC24FJ128GA106-I/PT Datasheet - Page 37

IC PIC MCU FLASH 64TQFP

PIC24FJ128GA106-I/PT

Manufacturer Part Number
PIC24FJ128GA106-I/PT
Description
IC PIC MCU FLASH 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr

Specifications of PIC24FJ128GA106-I/PT

Program Memory Type
FLASH
Program Memory Size
128KB (43K x 24)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDMA240015 - BOARD MCV PIM FOR 24F256GA
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ128GA106-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC24FJ128GA106-I/PT
0
4.2
The PIC24F core has a separate, 16-bit wide data mem-
ory space, addressable as a single linear range. The
data space is accessed using two Address Generation
Units (AGUs), one each for read and write operations.
The data space memory map is shown in
All Effective Addresses (EAs) in the data memory space
are 16 bits wide and point to bytes within the data space.
This gives a data space address range of 64 Kbytes or
32K words. The lower half of the data memory space
(that is, when EA<15> = 0) is used for implemented
memory addresses, while the upper half (EA<15> = 1) is
reserved for the program space visibility area (see
Section 4.3.3 “Reading Data From Program Memory
Using Program Space
FIGURE 4-3:
 2010 Microchip Technology Inc.
Note:
Data Address Space
Implemented
Data RAM
Data memory areas are not shown to scale.
DATA SPACE MEMORY MAP FOR PIC24FJ256GA110 FAMILY DEVICES
Visibility”).
Address
FFFFh
1FFFh
7FFFh
07FFh
47FFh
0001h
0801h
2001h
4801h
8001h
MSB
Figure
MSB
PIC24FJ256GA110 FAMILY
4-3.
Unimplemented
Program Space
Visibility Area
SFR Space
Read as ‘0’
Data RAM
LSB
PIC24FJ256GA110 family devices implement a total of
16 Kbytes of data memory. Should an EA point to a
location outside of this area, an all zero word or byte will
be returned.
4.2.1
The
byte-addressable, 16-bit wide blocks. Data is aligned
in data memory and registers as 16-bit words, but all
data space EAs resolve to bytes. The Least Significant
Bytes (LSBs) of each word have even addresses, while
the Most Significant Bytes (MSBs) have odd
addresses.
data
DATA SPACE WIDTH
Address
0000h
07FEh
0800h
1FFEh
2000h
47FEh
4800h
7FFFh
8000h
FFFEh
LSB
memory
Space
SFR
space
Data Space
is
DS39905E-page 37
Near
organized
in

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